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    <title>topic Cisco UCS C3260 Storage Server - firmware upgrade failed, recovery in Technical Documentation Ideas</title>
    <link>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4783008#M1789</link>
    <description>&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;Sounds like I have broken/bricked UCS C3260 M4 chassis/nodes with firmware upgrade.&lt;/P&gt;&lt;P&gt;I did not complete full upgrade and mistakenly rebooted the chassis while BMC and Raid controllers were only updated with ucs-c3260-huu-2.0.13n firmware.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Now it is constantly rebooting. Earlier it able to power on the screen/display, now even screen is not coming up, blank.&lt;BR /&gt;From the serial debug console, I can see it is loading U-Boot and hangs right before the command prompt, or within a few seconds of giving that prompt.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Any help? I was unable to find any instructions for firmware recovery for this specific chassis.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Highly appreciate your help&lt;/P&gt;&lt;P&gt;========= Serial console output =========&lt;/P&gt;&lt;P&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;BR /&gt;[MCPSUMR 0x00000000, RSTRSCR 0x00000000, AUTORSTSR 0x0000c000]&lt;BR /&gt;I2C buses: divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;ready&lt;BR /&gt;DRAM: Configuring DDR for 666.667 MT/s data rate&lt;BR /&gt;DDR configuration get done&lt;BR /&gt;512 MiB (DDR3, 32-bit, CL=6, ECC on)&lt;BR /&gt;U-boot retry count 1Self checking ...&lt;BR /&gt;retrieving MAC addresses from EEPROM Internal Area&lt;BR /&gt;NIOM's FRU MAC's are&lt;BR /&gt;00:FC:BA:3B:DD:54&lt;BR /&gt;00:FC:BA:3B:DD:55&lt;BR /&gt;Memory test from 0x40000 to 0x1fdfffff&lt;BR /&gt;Data line test................ OK&lt;BR /&gt;Address line test............. OK&lt;BR /&gt;OK&lt;BR /&gt;Flash: 288 MiB&lt;BR /&gt;L2: 256 KB enabled&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Set dbglevel to its default value (0x1)&lt;BR /&gt;PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000&lt;BR /&gt;PCIe2: Bus 01 - 01&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;VIC card present = 1&lt;BR /&gt;Board: COLUSA2IOM_A0&lt;BR /&gt;uboot version 2.23&lt;BR /&gt;colusa2iom rev: 4&lt;BR /&gt;CMC_SLOT_ID: 0&lt;BR /&gt;Net: eTSEC2 is in sgmii mode.&lt;BR /&gt;eTSEC1, eTSEC2&lt;BR /&gt;I2C Clock is 105 KHz&lt;BR /&gt;0&lt;BR /&gt;Auto-boot image 2&lt;BR /&gt;Boot string: "linux2boot"&lt;BR /&gt;. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBComputed Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;Embedded Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Signature verification was successf. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIB## Booting kernel from Legacy Image at 01000000 ...&lt;BR /&gt;Image Name: Linux-3.18.7&lt;BR /&gt;Created: 2019-12-18 11:53:32 UTC&lt;BR /&gt;Image Type: PowerPC Linux Kernel Image (gzip compressed)&lt;BR /&gt;Data Size: 9603611 Bytes = 9.2 MiB&lt;BR /&gt;Load Address: 00000000&lt;BR /&gt;Entry Point: 00000000&lt;BR /&gt;Verifying Checksum ... OK&lt;BR /&gt;## Flattened Device Tree blob at 00e00000&lt;BR /&gt;Booting using the fdt blob at 0x00e00000&lt;BR /&gt;Uncompressing Kernel Image ... OK&lt;BR /&gt;Loading Device Tree to 03ffa000, end 03fff982 ... OK&lt;BR /&gt;setup_arch: bootmem&lt;BR /&gt;fex_setup_arch()&lt;BR /&gt;arch: exit&lt;/P&gt;&lt;P&gt;Mounting application filesystems: [ OK ]&lt;BR /&gt;Locating OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting Config filesystem: [ OK ]&lt;BR /&gt;Setting up /etc/network: [ OK ]&lt;BR /&gt;Locating system image: [ OK ]&lt;BR /&gt;Unpacking Base FS: [ OK ]&lt;BR /&gt;Unpacking CMC FS: [ OK ]&lt;BR /&gt;/mnt/jffs2/avct_ems_cfg/BMC_Data....Setting up /flash/data0[ OK ]&lt;BR /&gt;Creating link /usr/bin/awk ... [ OK ]&lt;BR /&gt;Determining password file ...root: security_manager_setup: avctpasswd_userdb.ini is the current user database file&lt;BR /&gt;[ OK ]&lt;BR /&gt;kernel.core_uses_pid = 1&lt;BR /&gt;kernel.core_pattern = |/nuova/bin/zcore /var/cmc/core/%t_%e_core.%p-%s&lt;BR /&gt;vm.panic_on_oom = 1&lt;BR /&gt;vm.oom_dump_tasks = 1&lt;BR /&gt;net.ipv4.conf.all.route_localnet = 1&lt;BR /&gt;net.core.wmem_max = 524288&lt;BR /&gt;net.core.rmem_max = 524288&lt;BR /&gt;Starting internet superserver: inetd [ OK ]&lt;BR /&gt;Setting up networking: [ OK ]&lt;BR /&gt;CMC slot 0&lt;BR /&gt;Starting network interfaces: ifconfig: SIOCSIFHWADDR: Device or resource busy&lt;BR /&gt;[ OK ]&lt;BR /&gt;NOT starting OBFL logger&lt;BR /&gt;Starting PMON: [ OK ]&lt;BR /&gt;Running carduil -d&lt;BR /&gt;Discovered 1 Cisco cards.&lt;BR /&gt;[ OK ]&lt;/P&gt;&lt;P&gt;Please press Enter to activate this console.&lt;BR /&gt;CMC Debug Firmware Utility Shell [ root ]&lt;BR /&gt;[ help ]#&lt;/P&gt;&lt;P&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;lt;cut, repeating boot process here&amp;gt;&lt;/P&gt;&lt;P&gt;[ help ]# __________________________________________&lt;BR /&gt;Debug Firmware Utility&lt;BR /&gt;__________________________________________&lt;BR /&gt;Command List&lt;BR /&gt;__________________________________________&lt;/P&gt;&lt;P&gt;alarms&lt;BR /&gt;cartridges&lt;BR /&gt;cms&lt;BR /&gt;cores&lt;BR /&gt;exit&lt;BR /&gt;fans&lt;BR /&gt;gpio&lt;BR /&gt;i2c&lt;BR /&gt;images&lt;BR /&gt;led&lt;BR /&gt;mctools&lt;BR /&gt;memory&lt;BR /&gt;messages&lt;BR /&gt;network&lt;BR /&gt;obfl&lt;BR /&gt;ohms&lt;BR /&gt;post&lt;BR /&gt;programmables&lt;BR /&gt;psu&lt;BR /&gt;tasks&lt;BR /&gt;temperatures&lt;BR /&gt;thermal&lt;BR /&gt;top&lt;BR /&gt;update&lt;BR /&gt;voltages&lt;BR /&gt;version&lt;BR /&gt;fru&lt;BR /&gt;sel&lt;BR /&gt;sensors&lt;BR /&gt;cli&lt;BR /&gt;i2cstats&lt;BR /&gt;help [COMMAND]&lt;BR /&gt;__________________________________________&lt;BR /&gt;Notes:&lt;BR /&gt;"enter Key" will execute last command&lt;BR /&gt;"COMMAND ?" will execute help for that command&lt;BR /&gt;__________________________________________&lt;/P&gt;&lt;P&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;BR /&gt;[MCPSUMR 0x00000000, RSTRSCR 0x00000000, AUTORSTSR 0x0000c000]&lt;BR /&gt;I2C buses: divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;ready&lt;BR /&gt;DRAM: Configuring DDR for 666.667 MT/s data rate&lt;BR /&gt;DDR configuration get done&lt;BR /&gt;512 MiB (DDR3, 32-bit, CL=6, ECC on)&lt;BR /&gt;U-boot retry count 1Self checking ...&lt;BR /&gt;retrieving MAC addresses from EEPROM Internal Area&lt;BR /&gt;NIOM's FRU MAC's are&lt;BR /&gt;00:FC:BA:3B:DD:54&lt;BR /&gt;00:FC:BA:3B:DD:55&lt;BR /&gt;Memory test from 0x40000 to 0x1fdfffff&lt;BR /&gt;Data line test................ OK&lt;BR /&gt;Address line test............. OK&lt;BR /&gt;OK&lt;BR /&gt;Flash: 288 MiB&lt;BR /&gt;L2: 256 KB enabled&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Set dbglevel to its default value (0x1)&lt;BR /&gt;PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000&lt;BR /&gt;PCIe2: Bus 01 - 01&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;VIC card present = 1&lt;BR /&gt;Board: COLUSA2IOM_A0&lt;BR /&gt;uboot version 2.23&lt;BR /&gt;colusa2iom rev: 4&lt;BR /&gt;CMC_SLOT_ID: 0&lt;BR /&gt;Net: eTSEC2 is in sgmii mode.&lt;BR /&gt;eTSEC1, eTSEC2&lt;BR /&gt;I2C Clock is 105 KHz&lt;BR /&gt;0&lt;BR /&gt;Auto-boot image 2&lt;BR /&gt;Boot string: "linux2boot"&lt;BR /&gt;.. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBComputed Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;Embedded Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Signature verification was successf.. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIB## Booting kernel from Legacy Image at 01000000 ...&lt;BR /&gt;Image Name: Linux-3.18.7&lt;BR /&gt;Created: 2019-12-18 11:53:32 UTC&lt;BR /&gt;Image Type: PowerPC Linux Kernel Image (gzip compressed)&lt;BR /&gt;Data Size: 9603611 Bytes = 9.2 MiB&lt;BR /&gt;Load Address: 00000000&lt;BR /&gt;Entry Point: 00000000&lt;BR /&gt;Verifying Checksum ... OK&lt;BR /&gt;## Flattened Device Tree blob at 00e00000&lt;BR /&gt;Booting using the fdt blob at 0x00e00000&lt;BR /&gt;Uncompressing Kernel Image ... OK&lt;BR /&gt;Loading Device Tree to 03ffa000, end 03fff982 ... OK&lt;BR /&gt;setup_arch: bootmem&lt;BR /&gt;fex_setup_arch()&lt;BR /&gt;arch: exit&lt;/P&gt;&lt;P&gt;Mounting application filesystems: [ OK ]&lt;BR /&gt;Locating OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting Config filesystem: [ OK ]&lt;BR /&gt;Setting up /etc/network: [ OK ]&lt;BR /&gt;Locating system image: [ OK ]&lt;BR /&gt;Unpacking Base FS:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;[ OK ]&lt;BR /&gt;Unpacking CMC FS: [ OK ]&lt;BR /&gt;/mnt/jffs2/avct_ems_cfg/BMC_Data....Setting up /flash/data0[ OK ]&lt;BR /&gt;Creating link /usr/bin/awk ... [ OK ]&lt;BR /&gt;Determining password file ...root: security_manager_setup: avctpasswd_userdb.ini is the current user database file&lt;BR /&gt;[ OK ]&lt;BR /&gt;kernel.core_uses_pid = 1&lt;BR /&gt;kernel.core_pattern = |/nuova/bin/zcore /var/cmc/core/%t_%e_core.%p-%s&lt;BR /&gt;vm.panic_on_oom = 1&lt;BR /&gt;vm.oom_dump_tasks = 1&lt;BR /&gt;net.ipv4.conf.all.route_localnet = 1&lt;BR /&gt;net.core.wmem_max = 524288&lt;BR /&gt;net.core.rmem_max = 524288&lt;BR /&gt;Starting internet superserver: inetd [ OK ]&lt;BR /&gt;Setting up networking: [ OK ]&lt;BR /&gt;CMC slot 0&lt;BR /&gt;Starting network interfaces: ifconfig: SIOCSIFHWADDR: Device or resource busy&lt;BR /&gt;[ OK ]&lt;BR /&gt;NOT starting OBFL logger&lt;BR /&gt;Starting PMON: [ OK ]&lt;BR /&gt;Running carduil -d&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Discovered 1 Cisco cards.&lt;BR /&gt;[ OK ]&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;BR /&gt;[MCPSUMR 0x00000000, RSTRSCR 0x00000000, AUTORSTSR 0x0000c000]&lt;BR /&gt;I2C buses: divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;ready&lt;BR /&gt;DRAM: Configuring DDR for 666.667 MT/s data rate&lt;BR /&gt;DDR configuration get done&lt;BR /&gt;512 MiB (DDR3, 32-bit, CL=6, ECC on)&lt;BR /&gt;U-boot retry count 1Self checking ...&lt;BR /&gt;retrieving MAC addresses from EEPROM Internal Area&lt;BR /&gt;NIOM's FRU MAC's are&lt;BR /&gt;00:FC:BA:3B:DD:54&lt;BR /&gt;00:FC:BA:3B:DD:55&lt;BR /&gt;Memory test from 0x40000 to 0x1fdfffff&lt;BR /&gt;Data line test................ OK&lt;BR /&gt;Address line test............. OK&lt;BR /&gt;OK&lt;BR /&gt;Flash: 288 MiB&lt;BR /&gt;L2: 256 KB enabled&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Set dbglevel to its default value (0x1)&lt;BR /&gt;PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000&lt;BR /&gt;PCIe2: Bus 01 - 01&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;VIC card present = 1&lt;BR /&gt;Board: COLUSA2IOM_A0&lt;BR /&gt;uboot version 2.23&lt;BR /&gt;colusa2iom rev: 4&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;lt;cut&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 27 Feb 2023 14:55:01 GMT</pubDate>
    <dc:creator>Vasyl</dc:creator>
    <dc:date>2023-02-27T14:55:01Z</dc:date>
    <item>
      <title>Cisco UCS C3260 Storage Server - firmware upgrade failed, recovery</title>
      <link>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4783008#M1789</link>
      <description>&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;Sounds like I have broken/bricked UCS C3260 M4 chassis/nodes with firmware upgrade.&lt;/P&gt;&lt;P&gt;I did not complete full upgrade and mistakenly rebooted the chassis while BMC and Raid controllers were only updated with ucs-c3260-huu-2.0.13n firmware.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Now it is constantly rebooting. Earlier it able to power on the screen/display, now even screen is not coming up, blank.&lt;BR /&gt;From the serial debug console, I can see it is loading U-Boot and hangs right before the command prompt, or within a few seconds of giving that prompt.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Any help? I was unable to find any instructions for firmware recovery for this specific chassis.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Highly appreciate your help&lt;/P&gt;&lt;P&gt;========= Serial console output =========&lt;/P&gt;&lt;P&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;BR /&gt;[MCPSUMR 0x00000000, RSTRSCR 0x00000000, AUTORSTSR 0x0000c000]&lt;BR /&gt;I2C buses: divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;ready&lt;BR /&gt;DRAM: Configuring DDR for 666.667 MT/s data rate&lt;BR /&gt;DDR configuration get done&lt;BR /&gt;512 MiB (DDR3, 32-bit, CL=6, ECC on)&lt;BR /&gt;U-boot retry count 1Self checking ...&lt;BR /&gt;retrieving MAC addresses from EEPROM Internal Area&lt;BR /&gt;NIOM's FRU MAC's are&lt;BR /&gt;00:FC:BA:3B:DD:54&lt;BR /&gt;00:FC:BA:3B:DD:55&lt;BR /&gt;Memory test from 0x40000 to 0x1fdfffff&lt;BR /&gt;Data line test................ OK&lt;BR /&gt;Address line test............. OK&lt;BR /&gt;OK&lt;BR /&gt;Flash: 288 MiB&lt;BR /&gt;L2: 256 KB enabled&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Set dbglevel to its default value (0x1)&lt;BR /&gt;PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000&lt;BR /&gt;PCIe2: Bus 01 - 01&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;VIC card present = 1&lt;BR /&gt;Board: COLUSA2IOM_A0&lt;BR /&gt;uboot version 2.23&lt;BR /&gt;colusa2iom rev: 4&lt;BR /&gt;CMC_SLOT_ID: 0&lt;BR /&gt;Net: eTSEC2 is in sgmii mode.&lt;BR /&gt;eTSEC1, eTSEC2&lt;BR /&gt;I2C Clock is 105 KHz&lt;BR /&gt;0&lt;BR /&gt;Auto-boot image 2&lt;BR /&gt;Boot string: "linux2boot"&lt;BR /&gt;. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBComputed Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;Embedded Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Signature verification was successf. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIB## Booting kernel from Legacy Image at 01000000 ...&lt;BR /&gt;Image Name: Linux-3.18.7&lt;BR /&gt;Created: 2019-12-18 11:53:32 UTC&lt;BR /&gt;Image Type: PowerPC Linux Kernel Image (gzip compressed)&lt;BR /&gt;Data Size: 9603611 Bytes = 9.2 MiB&lt;BR /&gt;Load Address: 00000000&lt;BR /&gt;Entry Point: 00000000&lt;BR /&gt;Verifying Checksum ... OK&lt;BR /&gt;## Flattened Device Tree blob at 00e00000&lt;BR /&gt;Booting using the fdt blob at 0x00e00000&lt;BR /&gt;Uncompressing Kernel Image ... OK&lt;BR /&gt;Loading Device Tree to 03ffa000, end 03fff982 ... OK&lt;BR /&gt;setup_arch: bootmem&lt;BR /&gt;fex_setup_arch()&lt;BR /&gt;arch: exit&lt;/P&gt;&lt;P&gt;Mounting application filesystems: [ OK ]&lt;BR /&gt;Locating OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting Config filesystem: [ OK ]&lt;BR /&gt;Setting up /etc/network: [ OK ]&lt;BR /&gt;Locating system image: [ OK ]&lt;BR /&gt;Unpacking Base FS: [ OK ]&lt;BR /&gt;Unpacking CMC FS: [ OK ]&lt;BR /&gt;/mnt/jffs2/avct_ems_cfg/BMC_Data....Setting up /flash/data0[ OK ]&lt;BR /&gt;Creating link /usr/bin/awk ... [ OK ]&lt;BR /&gt;Determining password file ...root: security_manager_setup: avctpasswd_userdb.ini is the current user database file&lt;BR /&gt;[ OK ]&lt;BR /&gt;kernel.core_uses_pid = 1&lt;BR /&gt;kernel.core_pattern = |/nuova/bin/zcore /var/cmc/core/%t_%e_core.%p-%s&lt;BR /&gt;vm.panic_on_oom = 1&lt;BR /&gt;vm.oom_dump_tasks = 1&lt;BR /&gt;net.ipv4.conf.all.route_localnet = 1&lt;BR /&gt;net.core.wmem_max = 524288&lt;BR /&gt;net.core.rmem_max = 524288&lt;BR /&gt;Starting internet superserver: inetd [ OK ]&lt;BR /&gt;Setting up networking: [ OK ]&lt;BR /&gt;CMC slot 0&lt;BR /&gt;Starting network interfaces: ifconfig: SIOCSIFHWADDR: Device or resource busy&lt;BR /&gt;[ OK ]&lt;BR /&gt;NOT starting OBFL logger&lt;BR /&gt;Starting PMON: [ OK ]&lt;BR /&gt;Running carduil -d&lt;BR /&gt;Discovered 1 Cisco cards.&lt;BR /&gt;[ OK ]&lt;/P&gt;&lt;P&gt;Please press Enter to activate this console.&lt;BR /&gt;CMC Debug Firmware Utility Shell [ root ]&lt;BR /&gt;[ help ]#&lt;/P&gt;&lt;P&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;lt;cut, repeating boot process here&amp;gt;&lt;/P&gt;&lt;P&gt;[ help ]# __________________________________________&lt;BR /&gt;Debug Firmware Utility&lt;BR /&gt;__________________________________________&lt;BR /&gt;Command List&lt;BR /&gt;__________________________________________&lt;/P&gt;&lt;P&gt;alarms&lt;BR /&gt;cartridges&lt;BR /&gt;cms&lt;BR /&gt;cores&lt;BR /&gt;exit&lt;BR /&gt;fans&lt;BR /&gt;gpio&lt;BR /&gt;i2c&lt;BR /&gt;images&lt;BR /&gt;led&lt;BR /&gt;mctools&lt;BR /&gt;memory&lt;BR /&gt;messages&lt;BR /&gt;network&lt;BR /&gt;obfl&lt;BR /&gt;ohms&lt;BR /&gt;post&lt;BR /&gt;programmables&lt;BR /&gt;psu&lt;BR /&gt;tasks&lt;BR /&gt;temperatures&lt;BR /&gt;thermal&lt;BR /&gt;top&lt;BR /&gt;update&lt;BR /&gt;voltages&lt;BR /&gt;version&lt;BR /&gt;fru&lt;BR /&gt;sel&lt;BR /&gt;sensors&lt;BR /&gt;cli&lt;BR /&gt;i2cstats&lt;BR /&gt;help [COMMAND]&lt;BR /&gt;__________________________________________&lt;BR /&gt;Notes:&lt;BR /&gt;"enter Key" will execute last command&lt;BR /&gt;"COMMAND ?" will execute help for that command&lt;BR /&gt;__________________________________________&lt;/P&gt;&lt;P&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;BR /&gt;[MCPSUMR 0x00000000, RSTRSCR 0x00000000, AUTORSTSR 0x0000c000]&lt;BR /&gt;I2C buses: divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;ready&lt;BR /&gt;DRAM: Configuring DDR for 666.667 MT/s data rate&lt;BR /&gt;DDR configuration get done&lt;BR /&gt;512 MiB (DDR3, 32-bit, CL=6, ECC on)&lt;BR /&gt;U-boot retry count 1Self checking ...&lt;BR /&gt;retrieving MAC addresses from EEPROM Internal Area&lt;BR /&gt;NIOM's FRU MAC's are&lt;BR /&gt;00:FC:BA:3B:DD:54&lt;BR /&gt;00:FC:BA:3B:DD:55&lt;BR /&gt;Memory test from 0x40000 to 0x1fdfffff&lt;BR /&gt;Data line test................ OK&lt;BR /&gt;Address line test............. OK&lt;BR /&gt;OK&lt;BR /&gt;Flash: 288 MiB&lt;BR /&gt;L2: 256 KB enabled&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Set dbglevel to its default value (0x1)&lt;BR /&gt;PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000&lt;BR /&gt;PCIe2: Bus 01 - 01&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;VIC card present = 1&lt;BR /&gt;Board: COLUSA2IOM_A0&lt;BR /&gt;uboot version 2.23&lt;BR /&gt;colusa2iom rev: 4&lt;BR /&gt;CMC_SLOT_ID: 0&lt;BR /&gt;Net: eTSEC2 is in sgmii mode.&lt;BR /&gt;eTSEC1, eTSEC2&lt;BR /&gt;I2C Clock is 105 KHz&lt;BR /&gt;0&lt;BR /&gt;Auto-boot image 2&lt;BR /&gt;Boot string: "linux2boot"&lt;BR /&gt;.. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBComputed Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;Embedded Hash SHA2: 400a5e2916daaca0779f39b261a2202cfe0d8644878bfeeb19ad90301a0e49fcef7744fdd8f4e4ac4a84a42c1a18dfa046ba66fc2fe929953c677b89d2680c5e&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Signature verification was successf.. it's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIBit's JFFS2_COMPR_ZLIB## Booting kernel from Legacy Image at 01000000 ...&lt;BR /&gt;Image Name: Linux-3.18.7&lt;BR /&gt;Created: 2019-12-18 11:53:32 UTC&lt;BR /&gt;Image Type: PowerPC Linux Kernel Image (gzip compressed)&lt;BR /&gt;Data Size: 9603611 Bytes = 9.2 MiB&lt;BR /&gt;Load Address: 00000000&lt;BR /&gt;Entry Point: 00000000&lt;BR /&gt;Verifying Checksum ... OK&lt;BR /&gt;## Flattened Device Tree blob at 00e00000&lt;BR /&gt;Booting using the fdt blob at 0x00e00000&lt;BR /&gt;Uncompressing Kernel Image ... OK&lt;BR /&gt;Loading Device Tree to 03ffa000, end 03fff982 ... OK&lt;BR /&gt;setup_arch: bootmem&lt;BR /&gt;fex_setup_arch()&lt;BR /&gt;arch: exit&lt;/P&gt;&lt;P&gt;Mounting application filesystems: [ OK ]&lt;BR /&gt;Locating OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting OBFL filesystem: [ OK ]&lt;BR /&gt;Mounting Config filesystem: [ OK ]&lt;BR /&gt;Setting up /etc/network: [ OK ]&lt;BR /&gt;Locating system image: [ OK ]&lt;BR /&gt;Unpacking Base FS:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;[ OK ]&lt;BR /&gt;Unpacking CMC FS: [ OK ]&lt;BR /&gt;/mnt/jffs2/avct_ems_cfg/BMC_Data....Setting up /flash/data0[ OK ]&lt;BR /&gt;Creating link /usr/bin/awk ... [ OK ]&lt;BR /&gt;Determining password file ...root: security_manager_setup: avctpasswd_userdb.ini is the current user database file&lt;BR /&gt;[ OK ]&lt;BR /&gt;kernel.core_uses_pid = 1&lt;BR /&gt;kernel.core_pattern = |/nuova/bin/zcore /var/cmc/core/%t_%e_core.%p-%s&lt;BR /&gt;vm.panic_on_oom = 1&lt;BR /&gt;vm.oom_dump_tasks = 1&lt;BR /&gt;net.ipv4.conf.all.route_localnet = 1&lt;BR /&gt;net.core.wmem_max = 524288&lt;BR /&gt;net.core.rmem_max = 524288&lt;BR /&gt;Starting internet superserver: inetd [ OK ]&lt;BR /&gt;Setting up networking: [ OK ]&lt;BR /&gt;CMC slot 0&lt;BR /&gt;Starting network interfaces: ifconfig: SIOCSIFHWADDR: Device or resource busy&lt;BR /&gt;[ OK ]&lt;BR /&gt;NOT starting OBFL logger&lt;BR /&gt;Starting PMON: [ OK ]&lt;BR /&gt;Running carduil -d&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Discovered 1 Cisco cards.&lt;BR /&gt;[ OK ]&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2011.12 (Sep 23 2019 - 11:31:42) Cisco Systems, Build: jenkins-Component-Builds-Rack-Patch Builds-patch_bmc_rel_ironcanyon_hp_mr3_bld67-83&lt;/P&gt;&lt;P&gt;CPU0: P1020E, Version: 1.1, (0x80ec0011)&lt;BR /&gt;Core: E500, Version: 5.1, (0x80212051)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:533.333 MHz, CPU1:533.333 MHz,&lt;BR /&gt;CCB:266.667 MHz,&lt;BR /&gt;DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:16.667 MHz&lt;BR /&gt;L1: D-cache 32 kB enabled&lt;BR /&gt;I-cache 32 kB enabled&lt;BR /&gt;[MCPSUMR 0x00000000, RSTRSCR 0x00000000, AUTORSTSR 0x0000c000]&lt;BR /&gt;I2C buses: divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;ready&lt;BR /&gt;DRAM: Configuring DDR for 666.667 MT/s data rate&lt;BR /&gt;DDR configuration get done&lt;BR /&gt;512 MiB (DDR3, 32-bit, CL=6, ECC on)&lt;BR /&gt;U-boot retry count 1Self checking ...&lt;BR /&gt;retrieving MAC addresses from EEPROM Internal Area&lt;BR /&gt;NIOM's FRU MAC's are&lt;BR /&gt;00:FC:BA:3B:DD:54&lt;BR /&gt;00:FC:BA:3B:DD:55&lt;BR /&gt;Memory test from 0x40000 to 0x1fdfffff&lt;BR /&gt;Data line test................ OK&lt;BR /&gt;Address line test............. OK&lt;BR /&gt;OK&lt;BR /&gt;Flash: 288 MiB&lt;BR /&gt;L2: 256 KB enabled&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;Set dbglevel to its default value (0x1)&lt;BR /&gt;PCIe1: Root Complex of mini PCIe SLOT, no link, regs @ 0xffe0a000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex of PCIe SLOT, no link, regs @ 0xffe09000&lt;BR /&gt;PCIe2: Bus 01 - 01&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;divider:1269, est_div:1280, DFSR:6&lt;BR /&gt;FDR:0x2c, speed:104166&lt;BR /&gt;VIC card present = 1&lt;BR /&gt;Board: COLUSA2IOM_A0&lt;BR /&gt;uboot version 2.23&lt;BR /&gt;colusa2iom rev: 4&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;lt;cut&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 27 Feb 2023 14:55:01 GMT</pubDate>
      <guid>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4783008#M1789</guid>
      <dc:creator>Vasyl</dc:creator>
      <dc:date>2023-02-27T14:55:01Z</dc:date>
    </item>
    <item>
      <title>Re: Cisco UCS C3260 Storage Server - firmware upgrade failed, recovery</title>
      <link>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4783665#M1790</link>
      <description>&lt;P&gt;Does anyone have any idea how to address it? I am exploring ability to replace existing HP SL4540 storage and possible blade chassis going forward... but met roadblock right at the begging. Having so great experience with Cisco's network equipment, hoping to get the same quality and reliability on servers and storages. Maybe some on from Cisco team itself can point me to the right direction?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 28 Feb 2023 02:50:08 GMT</pubDate>
      <guid>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4783665#M1790</guid>
      <dc:creator>Vasyl</dc:creator>
      <dc:date>2023-02-28T02:50:08Z</dc:date>
    </item>
    <item>
      <title>Re: Cisco UCS C3260 Storage Server - firmware upgrade failed, recovery</title>
      <link>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4789301#M1791</link>
      <description>&lt;P&gt;The problem solved. The chassis which has no single HDD in the bays yet, with just 4 SSDs and 2 nodes installed, did not want to boot properly on a single power supply and kept rebooting. There was no any indication or warning for requiring more PSU power available or whatever.&lt;/P&gt;&lt;P&gt;Strange and silly.&lt;/P&gt;&lt;P&gt;The question is closed.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 08 Mar 2023 07:33:37 GMT</pubDate>
      <guid>https://community.cisco.com/t5/technical-documentation-ideas/cisco-ucs-c3260-storage-server-firmware-upgrade-failed-recovery/m-p/4789301#M1791</guid>
      <dc:creator>Vasyl</dc:creator>
      <dc:date>2023-03-08T07:33:37Z</dc:date>
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