9800-40 add HA causes boot to CPP Diag

richard.greene1 — Mon, 05 Jul 2021 20:01:44 GMT

WLC#chassis redundancy ha-interface local-ip 192.168.0.2 255.255.255.0 r
WLC#$-interface local-ip 192.168.0.2 255.255.255.0 remote-ip 192.168.0.1
WARNING: Changing the chassis HA interface IP address may result in a configuration change for that chassis.Also,Do not use any existing Service/Management IP address while co nfiguring HA interface to avoid Duplicate IP.Do you want to continue?[y/n]? [yes]: y
WLC#
Chassis 2 reloading, reason - stack merge
Mar 22 18:15:07.691: %PMAN-5-EXITACTION: F0/0: pvp: Process manager is exiting:
Mar 22 18:15:07.766: %PMTACTION: C0/0: pvp: Process manag
Mar 22 18:15:08.851: %PMAN-5-EXITACTION: R0/0: pvp: Process manager is exiting: process exit with reload fru code
Mar 22 18:15:21.444: %PMAN-3-PROCESS_NOTIFICATION: R0/0: pvp: System report core/WLC_2_RP_0-system-report_20210322-181516-UTC.tar.gz (size: 10956 KB) generated and System repo rt info at core/WLC_2_RP_0-system-report_20210322-181516-UTC-info.txt

Initializing Hardware ...

System integrity status: 90170200 12030107

Current image running: Boot ROM0
Last reset cause: LocalSoft

C9800-40-K9 platform with 33554432 Kbytes of main memory

no valid BOOT image found
Final autoboot attempt from default boot device...
File size is 0x00000022
Located pnp-tech-time
Image size 34 inode num 12, bks cnt 1 blk size 8*512
#
Boot image size = 34 (0x22) bytes

Unsigned package found, aborting package loading...

Failed to Free memory block at address 0x00000000ce5dd000
File size is 0x00500000
Located ssd
Image size 5242880 inode num 17, bks cnt 1280 blk size 8*512
###################################################
Boot image size = 5242880 (0x500000) bytes

Unsigned package found, aborting package loading...

Failed to Free memory block at address 0x00000000ce5a5000
File size is 0x07d33401
Located mcpwlc-diag-ids-rel25.11-2004291556.bin
Image size 131281921 inode num 13, bks cnt 32052 blk size 8*512
############################################################################################################################################################################### ############################################################################################################################################################################### ############################################################################################################################################################################### ############################################################################################################################################################################### ############################################################################################################################################################################### ############################################################################################################################################################################### ############################################################################################################################################################################### #########################################################
Boot image size = 131281921 (0x7d33401) bytes

ROM:RSA Self Test Passed
ROM:Sha512 Self Test Passed

RSA Signed DEVELOPMENT Image Signature Verification Successful.
Image validated
init_clocks : setting cpu_tb_freq_ll 2,000,000,000 Hz
init_clocks : detected 2000055968 Hz (2,000,055,968)
init_clocks : check for 2,500,000,000 Hz range: min/max 2,350,000,000/2,650,000,000 Hz
init_clocks : check for 2,000,000,000 Hz range: min/max 1,880,000,000/2,120,000,000 Hz
init_clocks : setting cpu_tb_freq_ll 2,000,000,000 Hz
** setting PCI BASE ADDR = 0xe0000000 **
x86_64_init_emulated_immap: setting up i2c.
init_clocks : setting cpu_tb_freq_ll 2,000,000,000 Hz
determine_platform_type Platform : 200001c
x86_64_mmap_platform_devices : Early Install of PCIe.
x86_64_mmap_platform_devices()1361: PCIE ID 6f0a8086 (0x00, 0x03, 0x02) Yoda 0 (root), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 8c108086 (0x00, 0x1c, 0x00) NP5C (root), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 8c128086 (0x00, 0x1c, 0x01) Luna 0 (root), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 8c128086 (0x00, 0x1c, 0x01) TRIXIE (root), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 8c148086 (0x00, 0x1c, 0x02) Astro (root), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 8c168086 (0x00, 0x1c, 0x03) Luna 1 (root), instance 1.
x86_64_mmap_platform_devices()1361: PCIE ID 8c188086 (0x00, 0x1c, 0x04) Octeon (root), instance 0.
x86_64_mmap_platform_devices()1269: PCIE ID 002f1137 (0x0c, 0x00, 0x00) Yoda 0 (end point), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 05c111ab (0x0e, 0x00, 0x00) NP5C (end point), instance 0.
x86_64_mmap_platform_devices()1297: PCIE ID 02411137 (0x0f, 0x00, 0x00) Luna 0 (end point), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 00531137 (0x10, 0x00, 0x00) Astro (end point), instance 0.
x86_64_mmap_platform_devices()1361: PCIE ID 00531137 (0x10, 0x00, 0x00) ASTRO (end point), instance 0.
x86_64_mmap_platform_devices()1297: PCIE ID 02421137 (0x11, 0x00, 0x00) Luna 1 (end point), instance 1.
x86_64_mmap_platform_devices()1361: PCIE ID 0091177d (0x12, 0x00, 0x00) Octeon (end point), instance 0.
x86_64_mmap_platform_devices: Entry rp2ruveh_pcie[2].cpu_addr[2] for Octeon skipped because its zero.
x86_64_mmap_platform_devices: Entry rp2ruveh_pcie[5].cpu_addr[1] for Luna 0 skipped because its zero.
x86_64_mmap_platform_devices: Entry rp2ruveh_pcie[6].cpu_addr[1] for Luna 1 skipped because its zero.
x86_64_mmap_platform_devices : !!!! bar_ndx is 11. It should be 17 for Kahuna and 12 for Speedracer.
x86_64_mmap_platform_devices : ;Astro addr range 0x[f0000000, f1ffffff] already mapped by initial page table.
x86_64_mmap_platform_devices : ;ASTRO addr range 0x[f0000000, f1ffffff] already mapped by initial page table.
x86_64_mmap_platform_devices : ;Luna 1 addr range 0x[f2000000, f2ffffff] already mapped by initial page table.
x86_64_mmap_platform_devices : ;Luna 0 addr range 0x[f3000000, f37fffff] already mapped by initial page table.
x86_64_mmap_this_range : Yoda 0 map virt [1ffe00000000, 1ffeffffffff] to phys 1ffe00000000.
x86_64_mmap_platform_devices : ;Yoda 0 addr range 0x[1ffe00000000, 1ffeffffffff] not mapped by initial page table.
x86_64_mmap_this_range : WARNING -- 2M align requested map size for Yoda 0 from 100 to 200000!!
x86_64_mmap_this_range : Yoda 0 map virt [1fff00000000, 1fff001fffff] to phys 1fff00000000, orig was v [1fff00000000, 1fff000000ff] to p 1fff00000000.
x86_64_mmap_platform_devices : ;Yoda 0 addr range 0x[1fff00000000, 1fff000000ff] not mapped by initial page table.
x86_64_mmap_this_range : Octeon map virt [1fff04000000, 1fff07ffffff] to phys 1fff04000000.
x86_64_mmap_platform_devices : ;Octeon addr range 0x[1fff04000000, 1fff07ffffff] not mapped by initial page table.
x86_64_mmap_this_range : WARNING -- 2M align requested map size for Octeon from 4000 to 200000!!
x86_64_mmap_this_range : Octeon map virt [1fff08000000, 1fff081fffff] to phys 1fff08000000, orig was v [1fff08000000, 1fff08003fff] to p 1fff08000000.
x86_64_mmap_platform_devices : ;Octeon addr range 0x[1fff08000000, 1fff08003fff] not mapped by initial page table.
x86_64_mmap_this_range : NP5C map virt [1fff0a000000, 1fff0bffffff] to phys 1fff0a000000.
x86_64_mmap_platform_devices : ;NP5C addr range 0x[1fff0a000000, 1fff0bffffff] not mapped by initial page table.
x86_64_mmap_this_range : NP5C map virt [1fff0c000000, 1fff0dffffff] to phys 1fff0c000000.
x86_64_mmap_platform_devices : ;NP5C addr range 0x[1fff0c000000, 1fff0dffffff] not mapped by initial page table.
x86_64_mmap_this_range : WARNING -- 2M align requested map size for NP5C from 100000 to 200000!!
x86_64_mmap_this_range : NP5C map virt [1fff0e000000, 1fff0e1fffff] to phys 1fff0e000000, orig was v [1fff0e000000, 1fff0e0fffff] to p 1fff0e000000.
x86_64_mmap_platform_devices : ;NP5C addr range 0x[1fff0e000000, 1fff0e0fffff] not mapped by initial page table.
highest_unused_pml4_chunk: Use ffffff8000000000 (pos = 0x1ff) for unused memory start ...
x86_64_map_xtnded_mem: x86_64_xtnd_mem_start ffffff8000000000
x86_64_map_xtnded_mem: x86_64_xtnd_mem_size 7c877a000

Starting MCP diags ...
CC2RUVEH_STUB(htPatchPpcNodeInfo): 0 a76669 f8030000 f8030000 d46f8969 943577.
CC2RUVEH_STUB(htPatchSlaveNodeInfo): 0 dcce5374 f8030000 f8030000 a49c7674 943577.
init_exceptions : turning ON interrupts.
release_early_platform_resets: cleared i2c bus with idprom read.
board_htdp_register: Control ID=0xCCF (1RUVEH) SpeedRacer
htdp_register: Control ID=0xCCF (1RUVEH), type=9 handle=0
htdp_register: Control ID=0xCCF (1RUVEH), type=14 handle=2

CPP Diag Open.

DBOvr: Board Type var CPP_PLATFORM_DB_INDEX_BOARD
cpp_platform_query_board(): board (0x4871, 18545)
cpp_offdiag_open(): Calling cpp_drv_main()...
cpp_drv_main() cpp_id = 0...
cpp_drv_main() cpp_drv_get_context()...
cpp_drv_main() platform_cpp_devices_present = 1
cpp_drv_main() cpp_drv_context_init()...
cpp_drv_main() cpp_drv_hal_load()...
cpp_drv_main() cpp_drv_shmem_init()...
shm_open: initializing FP shm list
shm_open: shm filename /cpp_drv0_shm not found, returning -1
shm_open: shm filename /cpp_drv0_shm created for user 1
MCP_STUB(ftruncate): 64000000 4000 3 11 d 400000.
mmap64: mapping 79c1c000 to 892b000 -- len = 0x400000, prot = 0x3, flags = 0x11, filedes = 0x64, off = 0x0.
cpp_drv_main() cpp_drv_rwlock_init()...
cpp_drv_main() cerr_register()...
cpp_drv_main() cpp_event_context_to_smc()...
cpp_drv_main() cpp_drv_debug_init()...
getenv: need CPP_DRV_DBG_ì_ALL
getenv: need CPP_DRV_DBG_ì_INFO
getenv: need CPP_DRV_DBG_ì_TRACE
cpp_drv_main() cpp_drv_devobj_init()...
cpp_drv_main() num_sdev = 1
cpp_drv_main() cpp_drv_start_standalone(): 0 ...
cpp_drv_create_typed_devobj() dev_yoda_create...0:0

cpp_drv_hw_init() cpp_drv_devobj_fetch_platdb()...0:0

cpp_drv_hw_init() cpp_drv_hal_init()...
cpp_drv_hw_init() cpp_drv_hal_impl_init()...
getenv: need CPP_DRV_HAL_GLOBAL_ACCTRC
cpp_drv_hw_init() DEV_ATTACH()...
getenv: need CPP_DRV_HAL_DISPLAY_CONFIG
cpp_drv_hw_init() interrupt init...
getenv: need CPP_DRV_INTR_OVERRIDE_0_0
cpp_offdiag_open() Initializing 1 sub devices...
cpp_offdiag_open() LDEBUG LDEBUG WARNINGS = 1
INFO: CPP Offdiag Trace (default) value set to 0
CPP_DBG_FLAG_SEV_ERRORS TRUE
CPP_DBG_FLAG_SEV_WARNINGS TRUE
cpp_offdiag_open(): CPP:0 diag handle: 8b3e190
cpp_offdiag_open(): CPP:0 operational mask: 0x00000001, num subdevs = 1
SDEV: 0, devobj = 89b3d50
cpp_offdiag_open...return
release_early_platform_resets: ===============================================================
release_early_platform_resets: Clearing out Ibex Peak Errors - remove once ROMMON clears =
release_early_platform_resets: COMMENTED OUT FOR NOW!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! =
release_early_platform_resets: ===============================================================

======= CHECKING CPU FOR LOGGED ERRORS ======
=============================================

System Memory Size Info
Diags Footprint - Start 0x100000 Size 0x20c74278 (549929592) bytes.
Free Memory - Start 0xffffff8000000000 Size 0x7c877a000 (33428054016) bytes.
Total System Memory - (0x7f5bbf000) 34187505664 bytes.

for now, skip initialize_temp_sensors, avoid Timeout waiting for not BUSY, MAX6654.
startup: Disabling board idprom write protect!!
Initializing DS31408...
DS31408 is locked to Local Osc.
DS31408 is locked to APLL 1.
DS31408 is locked to APLL 2.
DS31408 is locked to APLL 3.
DS31408 is locked to MCPLL.
SYSTEM: ########## NP5C EZ Driver now running #########
SYSTEM: Running NP5C EZ Driver Version: 14.44.11a
-------------------NP0 Opened ----------------
SYSTEM: Beginning EPA OIR sequence...
SYSTEM: Detected EPA in bay 0...
SYSTEM: Host enabled 12V to EPA
SYSTEM: Detected HOST_PWR_OK after 0 ms
SYSTEM: Detected PWR_OK from EPA after 0 ms
SYSTEM: Detected READY from EPA 0 ms after detecting PWR_OK
SYSTEM: Host released RESET to EPA
SYSTEM: Pre-discovering EPA bay:0

Initialize Callisto EPA data structures
SYSTEM: bay:1 No EPA present, skip pre-discovery

SYSTEM: Crypto Module (Octeon Device) is present

##### New Board: CPLD Version=0xF000F84D #####

RPWLC Diagnostics initialization... complete

*****************************************************
*****************************************************
* MCP Diagnostics Version PRIVATE (2004291804x)
*
* Compiled by antam on Wed Apr 29 18:04:54 PDT 2020
* MCP View: /auto/asr1kdiag_build/mcp/release/rel25/views/mcp
* SPA View: antam-antam-spa-rel25-build3
* CPP WS: /auto/asr1kdiag_build/mcp/release/rel25/views/cpp
* MCP WS: /auto/asr1kdiag_build/mcp/release/rel25/views/driver
*****************************************************
*****************************************************
IDS Initialized
SYSTEM: Ids System: Initialize RPWLC DB
SYSTEM: Ids System: Slot 0 - Scanning EPA bays (secondary discovery)
SYSTEM: Ids System: Found Built-in (4x10GE/1GE) (EPA ID: 0x1008 HW version: 1.0, IDPROM rev 0x4) in bay:0
Ids System
0 Slot
1 Board database
2 Test lists
help Help

Re: 9800-40 add HA causes boot to CPP Diag

Leo Laohoo — Mon, 22 Mar 2021 22:10:49 GMT

@richard.greene1 wrote:

RSA Signed DEVELOPMENT Image Signature Verification Successful.

Are you able to boot the appliance into ROMMON?

Re: 9800-40 add HA causes boot to CPP Diag

Mark Elsen — Tue, 23 Mar 2021 10:41:24 GMT

- Could be a bug , consider having a test with : 16.12.5

topic 9800-40 add HA causes boot to CPP Diag in Wireless

9800-40 add HA causes boot to CPP Diag

Re: 9800-40 add HA causes boot to CPP Diag

Re: 9800-40 add HA causes boot to CPP Diag