はじめに
T1 CAS、PRI 等のデジタル音声インタフェースをにおいて、
クロックの同期が正しく行われていない場合、回線で SLIP 等のエラーが
発生し、音声品質の劣化、FAX通信の失敗等の問題を引きおこします。
本ドキュメントでは、ISR 4K シリーズのVoice GWでのクロック同期状態の
確認の方法について解説します。
１．クロック同期状態の確認に使用されるコマンド
旧 ISRG2シリーズでクロック同期状態を確認する場合、
"show network-clocks" コマンドが使用されていました。
ISR4Kでは、以下の新しいコマンドが使用されます。
|
（Platform BackPlane Clocking 状態の表示）
# show network-clocks synchronization
（Module の Clocking/Framer 状態の表示）
# show platf hard subslot slot/subslot module device networkclock
# show platf hard subslot slot/subslot module device framer0
|
２．Clocking コマンドの使用例
以下に各コマンドの出力例を示します。
(1) BackPlaneのクロックをPRI回線に同期させる場合
|
（クロック関連の設定）
controller T1 0/3/0
framing esf
clock source line primary
linecode b8zs
cablelength long 0db
pri-group timeslots 1-24
：
network-clock synchronization automatic
network-clock input-source 1 controller T1 0/3/0
|
|
（BackPlaneクロック同期状態の表示）
# show network-clocks synchronization
Symbols: En - Enable, Dis - Disable, Adis - Admin Disable
NA - Not Applicable
* - Synchronization source selected
# - Synchronization source force selected
& - Synchronization source manually switched
Automatic selection process : Enable
Equipment Clock : 2048 (EEC-Option1)
Clock Mode : QL-Disable
ESMC : Disabled
SSM Option : 1
T0 : T1 0/3/0
Hold-off (global) : 300 ms
Wait-to-restore (global) : 300 sec
Tsm Delay : 180 ms
Revertive : No
Nominated Interfaces
Interface SigType Mode/QL Prio QL_IN ESMC Tx ESMC Rx
Internal NA NA/Dis 251 QL-SEC NA NA
*T1 0/3/0 NA NA/Dis 1 QL-SEC NA NA
#
|
|
(Module の Clocking/Framer 状態の表示)
#show platform hardware subslot 0/3 module device networkclock
primary clock 0, secondary clock 255, ntwk_clk_selected Yes, ntwk_clk_participate Yes,current clock = 0
PLL status= 1, and cntl = 17
#show platform hardware subslot 0/3 module device framer0
Controller T1 0 status:
Framing is ESF, Line code is B8ZS, Clock type is Line, Primary CLK SRC, Slave mode
Cablelength is 0xc1, CRC treshold is 320, FDL is disabled
Loopback state: No, CAS mode: FALSE, CCS mode: TRUE
AIS State:Clear, LOS State:Clear, LOF State:Clear
PLL status= 1, PLL cntl = 17
primary_clk_src = 0, secondary_clk_src = ff, ntwk-clk-selected = YES, ntwk-clk-participate = YES, current_clk_setting = 0
fsync_unexp_err_count = 0, fsync_missing_err_count = 0, TDMPLL_int_count =0x80
PMC_MODE_STATUS1 0x0000000e, PMC_MODE_STATUS2 0xffff000f
Framer Register for line 0
Reg : +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +a +b +c +d +e +f
0x00: 00 0e 18 04 00 00 0c 00 00 00 00 00 00 01 00 20
0x10: 00 00 00 00 00 2f 2f 10 00 00 c0 90 78 78 ff ff
0x20: 78 78 ff ff 7c 78 ff ff 20 00 00 00 00 00 00 00
0x30: 31 a0 00 00 00 00 00 00 20 00 00 00 00 00 00 00
0x40: 21 a1 21 00 00 00 00 00 71 00 01 ff 24 30 08 24
0x50: 04 04 00 00 30 30 10 92 00 00 00 00 00 00 00 00
0x60: 10 10 00 00 04 00 30 3f 00 00 38 3f 03 03 ff 00
0x70: 03 03 bf 00 7c 7a ff ff 00 00 00 38 01 03 00 00
0x80: 60 00 c0 cb c0 c0 00 00 ff ff ff ff ff ff ff ff
0x90: 82 c0 00 00 00 00 70 00 00 00 00 00 00 00 00 00
0xa0: 10 00 3c 3c 58 43 00 00 82 c0 87 80 a0 00 ff ff
0xb0: 7d 78 ff ff 7e 78 ff ff 00 00 00 00 00 00 04 ff
0xc0: e0 00 80 00 ff ff ff ff ff ff ff ff ff ff ff ff
0xd0: ff ff ff ff ff ff 0f 0f f8 b9 c7 98 a6 e3 20 2c
0xe0: 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00
0xf0: 10 11 bc 80 80 80 80 00 15 cc 20 20 ff 7f 05 0b
ds0 0 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 1 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 2 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 3 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 4 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 5 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 6 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 7 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 8 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 9 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 10 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 11 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 12 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 13 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 14 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 15 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 16 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 17 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 18 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 19 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 20 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 21 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 22 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 23 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 24 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 25 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 26 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 27 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 28 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 29 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 30 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 31 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
#
|
(2) BackPlaneのクロックをPRI回線に提供する場合
|
（クロック関連の設定）
controller T1 0/3/0
framing esf
clock source network
linecode b8zs
cablelength long 0db
pri-group timeslots 1-24
：
network-clock synchronization automatic
|
|
（BackPlaneクロック同期状態の表示）
#show network-clocks synchronization
Symbols: En - Enable, Dis - Disable, Adis - Admin Disable
NA - Not Applicable
* - Synchronization source selected
# - Synchronization source force selected
& - Synchronization source manually switched
Automatic selection process : Enable
Equipment Clock : 2048 (EEC-Option1)
Clock Mode : QL-Disable
ESMC : Disabled
SSM Option : 1
T0 : Internal
Hold-off (global) : 300 ms
Wait-to-restore (global) : 300 sec
Tsm Delay : 180 ms
Revertive : No
Nominated Interfaces
Interface SigType Mode/QL Prio QL_IN ESMC Tx ESMC Rx
*Internal NA NA/Dis 251 QL-SEC NA NA
#
|
|
(Module の Clocking/Framer 状態の表示)
#show platform hardware subslot 0/3 module device networkclock
primary clock 255, secondary clock 255, ntwk_clk_selected Yes, ntwk_clk_participate Yes,current clock = ff
PLL status= 1, and cntl = 17
#show platform hardware subslot 0/3 module device framer0
Controller T1 0 status:
Framing is ESF, Line code is B8ZS, Clock type is Network, Not CLK SRC, Slave mode
Cablelength is 0xc1, CRC treshold is 320, FDL is disabled
Loopback state: No, CAS mode: FALSE, CCS mode: TRUE
AIS State:Clear, LOS State:Clear, LOF State:Clear
PLL status= 1, PLL cntl = 17
primary_clk_src = ff, secondary_clk_src = ff, ntwk-clk-selected = YES, ntwk-clk-participate = YES, current_clk_setting = ff
fsync_unexp_err_count = 0, fsync_missing_err_count = 0, TDMPLL_int_count =0x80
PMC_MODE_STATUS1 0x0000000e, PMC_MODE_STATUS2 0xffff000f
Framer Register for line 0
Reg : +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +a +b +c +d +e +f
0x00: 00 0e 18 04 00 00 0c 00 00 00 00 00 00 01 00 20
0x10: 00 00 00 00 00 2f 2f 10 00 00 c0 90 78 7a ff ff
0x20: 78 7a ff ff 7c 7b ff ff 20 00 00 00 00 00 00 00
0x30: 31 a0 00 00 00 00 00 00 20 00 00 00 00 00 00 00
0x40: 21 a1 21 00 00 00 00 00 71 00 21 ff 24 30 08 24
0x50: 04 04 00 00 30 30 10 92 00 00 00 00 00 00 00 00
0x60: 10 10 00 00 00 00 30 3f 00 00 38 3f 03 03 ff 00
0x70: 03 03 bf 00 7c 79 ff ff 00 00 00 38 01 03 00 00
0x80: 60 00 c0 cb c0 c0 00 00 ff ff ff ff ff ff ff ff
0x90: 82 c0 00 00 00 00 70 00 00 00 00 00 00 00 00 00
0xa0: 10 00 3c 3c 58 43 00 00 82 c0 87 80 a0 00 ff ff
0xb0: 7d 78 ff ff 7e 78 ff ff 00 00 00 00 00 00 04 ff
0xc0: e0 00 80 00 ff ff ff ff ff ff ff ff ff ff ff ff
0xd0: ff ff ff ff ff ff 0f 0f f8 b9 c7 98 a6 e3 20 2c
0xe0: 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00
0xf0: 10 11 bc 80 80 80 80 00 15 cc 20 20 ff 7f 05 0b
ds0 0 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 1 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 2 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 3 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 4 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 5 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 6 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 7 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 8 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 9 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 10 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 11 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 12 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 13 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 14 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 15 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 16 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 17 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 18 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 19 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 20 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 21 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 22 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 23 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 24 TPSC DATA:0x00 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 25 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 26 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 27 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 28 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 29 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 30 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
ds0 31 TPSC DATA:0x40 IDLE:0x7f SIG:0x00 RPSC DATA:0x00
#
|
3. クロック同期の正常性の確認
クロック同期が正常に行われているかは、T1 controller の Slip Secs カウンターで
確認します。
(1) クロック同期が正常に行われている場合の表示例
|
#show controllers t1 0/3/0
T1 0/3/0 is up.
Applique type is Channelized T1
Cablelength is long gain36 0db
No alarms detected.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Framing is ESF, Line Code is B8ZS, Clock Source is Line Primary.
Data in current interval (297 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
#
|
(2) クロック同期に問題がある場合の表示例
#show controllers t1 0/3/0
T1 0/3/0 is up.
Applique type is Channelized T1
Cablelength is long gain36 0db
No alarms detected.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Framing is ESF, Line Code is B8ZS, Clock Source is Network.
Data in current interval (295 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
5 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
5 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
# |
まとめ
デジタル音声インタフェースを使用する場合、クロックの同期が正しく
設計されていないと、音声品質、FAX 通信等の様々な問題が発生します。
クロックの同期状態に問題がある場合、クロック同期設計・設定の見直しが|
必要になります。
参考ドキュメント
ISR 4K シリーズの T1/PRI 回線の同期設計について
Network Synchronization for the Cisco 4000 Series Integrated Services Routers
Cisco ISR シリーズのクロックの設定と動作 (ISR G2)
