Re: Nexus 93108TC-EX Not Booting-Up.

nikhil93 · ‎03-18-2020

Hi Guys,

I have Nexus 93108TC-EX which i want to use in the LAB Scenario.

When powered-on, It continuosly runs something in the loop. I have attached the LOG file below.

Also for the convinience i have attached a file containing the same logs.

Please help.

=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2020.03.18 13:42:17 =~=~=~=~=~=~=~=~=~=~=~=

CISCO SWITCH Ver7.61
Device detected on 0:1:2 after 0 msecs
Device detected on 0:1:1 after 0 msecs
Device detected on 0:1:0 after 0 msecs
**********************************************************************
** Copyright (c) 1999-2011 Intel Corporation. All rights reserved **
** Ivy Bridge specific Memory Detection Code **
** Major version number is: 1 **
** Minor version number is: 8 **
** Rev version number is: 0 **
** Build number is: 0 **
**********************************************************************

ERROR:Smbus read failed in device address a4
DIMM not populated on C:1 D:0
MRC SPD processing -- Started
MRC_SpdProcessing_IVB
MC capability:
IGD is not supported. No stolen memory for IGD / GTT.
Channel total limitation size is 16384
DDR frequency 1333 allowed(133 only)

Channel 0, Dimm 0, size is:8192 MB, Rank number 2

Channel 0, Dimm 1, size is:8192 MB, Rank number 2

Channel 1, Dimm 1, size is:8192 MB, Rank number 2
MCFrequency is:1333
Channel 0 tCL 9
Channel 1 tCL 9
Channel 0 tWR 10
Channel 1 tWR 10
Channel 0 tCWL = 7
Channel 1 tCWL = 7
Channel 0 tRP = 9
Channel 1 tRP = 9
Channel 0 tRCD = 9
Channel 1 tRCD = 9
Channel 0 tRAS = 24
Channel 1 tRAS = 24
Channel 0 tCL 9
Channel 1 tCL 9
Channel 0 tWR 10
Channel 1 tWR 10
Channel 0 tCWL = 7
Channel 1 tCWL = 7
Channel 0 tRP = 9
Channel 1 tRP = 9
Channel 0 tRCD = 9
Channel 1 tRCD = 9
Channel 0 tRAS = 24
Channel 1 tRAS = 24
MRC SPD processing -- SUCCESS. 845msec
MRC MC configuration -- Started
Pll busy wait
Pll busy wait done
MC lock frequency is: 1333
succeeded to configure MC frequency
Channel 0 tRRD = 4
Channel 0 tRTP = 5
Channel 0 tWTR = 5
Channel 0 tFAW = 20
Odt stretch start value is 8
Channel 1 tRRD = 4
Channel 1 tRTP = 5
Channel 1 tWTR = 5
Channel 1 tFAW = 20
Odt stretch start value is 8
Channel:0,DimmA Rank in DIMM is:2,DimmB Rank in DIMM is:2
Channel:1,DimmA Rank in DIMM is:0,DimmB Rank in DIMM is:2
MRC MC configuration -- SUCCESS. 462msec
MRC MC memory map -- Started
TOM (Total physical memory size) = 0x6000
TOLUD base = 0x800
BDSM base = 0x800
GTT base = 0x800
GGC value= 0x2
TSEG base = 0x7f8
Reclaim Enable
Remap Base 0x6000
Remap Limit 0x67ff
TOUUD Base 0x6800
ME stolen base 0x6000
ME stolen size 0x0
MRC MC memory map -- SUCCESS. 262msec
MRC init IO with default values -- Started
Clk pi init value channel 0 rank 0 pi 10
Clk pi init value channel 0 rank 1 pi 10
Clk pi init value channel 0 rank 2 pi 10
Clk pi init value channel 0 rank 3 pi 10
Clk pi init value channel 1 rank 2 pi 10
Clk pi init value channel 1 rank 3 pi 10
force RCOMP after SCOMP is initialized and wait 20 micro sec
MRC init IO with default values -- SUCCESS. 328msec
MRC DDR reset sequence -- Started
MRC DDR reset sequence -- SUCCESS. 5msec
MRC Pre-training -- Started
MRC_PreTraining
MRC Pre-training -- SUCCESS. 18msec
MRC read training -- Started

RECEIVE ENABLE START
Receive Enable to Channel 0 Rank 0
Can't locate SaPlatformPolicy - exiting.
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:0 Iterator:0 ---
00-127 = 11111111 11111111 10000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111 11111111 11111111 11111111 11111111 11111111
Edge size =60
Falling edge =16
Rising edge =84
Middle edge =114
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:1 Iterator:0 ---
00-127 = 11111111 11111111 11111111 11111000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111 11111111 11111111 11111111 11111111
Edge size =64
Falling edge =28
Rising edge =92
Middle edge =124
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:2 Iterator:0 ---
00-127 = 11111111 11111111 11111111 11111111 11111111 11111100 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 11111111 11111111
Edge size =61
Falling edge =45
Rising edge =112
Middle edge =14
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:3 Iterator:0 ---
00-127 = 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11110000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001011
Edge size =61
Falling edge =59
Rising edge =126
Middle edge =28
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:4 Iterator:0 ---
00-127 = 00000000 00000000 00000000 00000000 01111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 10000000 00000000 00000000 00000000
Edge size =63
Falling edge =96
Rising edge =33
Middle edge =64
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:5 Iterator:0 ---
00-127 = 00000000 00000000 00000000 00000000 00000000 00000000 00001111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11100000 00000000
Edge size =62
Falling edge =114
Rising edge =52
Middle edge =83
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:6 Iterator:0 ---
00-127 = 11000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
Edge size =61
Falling edge =1
Rising edge =68
Middle edge =98
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:7 Iterator:0 ---
00-127 = 11111111 11111111 10000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00011111 11111111 11111111 11111111 11111111 11111111
Edge size =61
Falling edge =16
Rising edge =83
Middle edge =113
Receive enable Pi scan values for Channel:0 Rank:0 SDRAM:8 Iterator:0 ---
00-127 = 00000000 00000001 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111000 00000000 00000000 00000000 00000000 00000000 00000000
Edge size =61
Falling edge =76
Rising edge =15
Middle edge =45
WARNING: Few logic delay are 1

Start back in time
No zero Round trip=54
No zero Round trip=52
No zero Round trip=50
No zero Round trip=48
No zero Round trip=46
No zero Round trip=44
No zero Round trip=42
Have zero
IO Latency 7
Logic delay sdram 2 value is:2
Logic delay sdram 3 value is:2
Logic delay sdram 4 value is:3
Logic delay sdram 5 value is:3
Logic delay sdram 6 value is:3
Logic delay sdram 7 value is:3
Logic delay sdram 8 value is:2
Have zero
All zero
WARNING: logic delay value for data module 0 change to 2

WARNING: logic delay value for data module 1 change to 2

WARNING: logic delay value for data module 6 change to 4

WARNING: logic delay value for data module 7 change to 4

WARNING: logic delay value for data module 8 change to 3

MRC_PiFineTuning start
Preamble rising edge array
-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=0 -2=0 -1=0 0=2 1=41 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 16 for byte 0 channel 0 rank 0
Noise offset 0
New falling edge 16 for byte 0 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=30 -2=49 -1=50 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 28 for byte 1 channel 0 rank 0
Noise offset -3
New falling edge 25 for byte 1 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=28 -3=46 -2=50 -1=50 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 45 for byte 2 channel 0 rank 0
Noise offset -4
New falling edge 41 for byte 2 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=9 -3=38 -2=50 -1=50 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 59 for byte 3 channel 0 rank 0
Noise offset -4
New falling edge 55 for byte 3 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=0 -2=1 -1=31 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 32 for byte 4 channel 0 rank 0
Noise offset -2
New falling edge 30 for byte 4 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=5 -2=46 -1=50 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 50 for byte 5 channel 0 rank 0
Noise offset -3
New falling edge 47 for byte 5 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=0 -2=2 -1=36 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 1 for byte 6 channel 0 rank 0
Noise offset -2
New falling edge 63 for byte 6 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=0 -2=0 -1=0 0=19 1=49 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 16 for byte 7 channel 0 rank 0
Noise offset 0
New falling edge 16 for byte 7 channel 0 rank 0

-25=0 -24=0 -23=0 -22=0 -21=0 -20=0 -19=0 -18=0 -17=0 -16=0 -15=0 -14=0 -13=0 -12=0 -11=0 -10=0 -9=0 -8=0 -7=0 -6=0 -5=0 -4=0 -3=31 -2=47 -1=49 0=50 1=50 2=50 3=50 4=50 5=50 6=50 7=50 8=50 9=50 10=50 11=50 12=50 13=50 14=50 15=50 16=50 17=50 18=50 19=50 20=50 21=50 22=50 23=50 24=50
Old falling edge 12 for byte 8 channel 0 rank 0
Noise offset -2
New falling edge 10 for byte 8 channel 0 rank 0

WARNING: smallest logic-delay is bigger than 1, it is : 2
Receive enable Rank 0 Channel 0 summary
--------------------------------
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 0 </Byte> <LogicDelay> 0 </LogicDelay> <Pi> 16 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 1 </Byte> <LogicDelay> 0 </LogicDelay> <Pi> 25 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 2 </Byte> <LogicDelay> 0 </LogicDelay> <Pi> 41 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 3 </Byte> <LogicDelay> 0 </LogicDelay> <Pi> 55 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 4 </Byte> <LogicDelay> 1 </LogicDelay> <Pi> 30 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 5 </Byte> <LogicDelay> 1 </LogicDelay> <Pi> 47 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 6 </Byte> <LogicDelay> 1 </LogicDelay> <Pi> 63 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 7 </Byte> <LogicDelay> 2 </LogicDelay> <Pi> 16 </Pi> </RecEn>
<RecEn> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 8 </Byte> <LogicDelay> 1 </LogicDelay> <Pi> 10 </Pi> </RecEn>
<IO_Latency> <Channel> 0 </Channel> <Rank> 0 </Rank> <IOLatency> 5 </IOLatency> </IO_Latency>
<Round_trip> <Channel> 0 </Channel> <Rank> 0 </Rank> <Roundtrip> 42 </Roundtrip> </Round_trip>
Can't locate SaPlatformPolicy - exiting.

READ DQ/DQS START
Predefined pattern mask for BYTE 0 0x0
Predefined pattern mask for BYTE 1 0x0
Predefined pattern mask for BYTE 2 0x0
Predefined pattern mask for BYTE 3 0x0
Predefined pattern mask for BYTE 4 0x0
Predefined pattern mask for BYTE 5 0x0
Predefined pattern mask for BYTE 6 0x0
Predefined pattern mask for BYTE 7 0x0
Predefined pattern mask for BYTE 8 0x0
Algorithm mode: working to update dqsN and dqsP not in the same time.
Algorithm mode: working to update dqsN.

Basic read DQ/DQS summary for Rank:0 Channel:0 dqsN
---------------------------------

1 2 3 4 5 6 7 8 9
0 2000 2000 2000 2000 2000 2000 2000 2000 2000
1 2000 2000 2000 2000 2000 2000 2000 2000 2000
2 2000 1998 2000 1999 2000 2000 2000 2000 2000
3 2000 0001 2000 0000 2000 2000 2000 2000 2000
4 2000 0000 0000 0000 2000 2000 1978 0019 2000
5 0660 0000 0000 0000 1999 1999 0000 0000 1391
6 0000 0000 0000 0000 0000 0016 0000 0000 0000
7 0000 0000 0000 0000 0000 0000 0000 0000 0000
8 0000 0000 0000 0000 0000 0000 0000 0000 0000
9 0000 0000 0000 0000 0000 0000 0000 0000 0000
10 0000 0000 0000 0000 0000 0000 0000 0000 0000
11 0000 0000 0000 0000 0000 0000 0000 0000 0000
12 0000 0000 0000 0000 0000 0000 0000 0000 0000
13 0000 0000 0000 0000 0000 0000 0000 0000 0000
14 0000 0000 0000 0000 0000 0000 0000 0000 0000
15 0000 0000 0000 0000 0000 0000 0000 0000 0000
16 0000 0000 0000 0000 0000 0000 0000 0000 0000
17 0000 0000 0000 0000 0000 0000 0000 0000 0000
18 0000 0000 0000 0000 0000 0000 0000 0000 0000
19 0000 0000 0000 0000 0000 0000 0000 0000 0000
20 0000 0000 0000 0000 0000 0000 0000 0000 0000
21 0000 0000 0000 0000 0000 0000 0000 0000 0000
22 0000 0000 0000 0000 0000 0000 0000 0000 0000
23 0000 0000 0000 0000 0000 0000 0000 0000 0000
24 0000 0000 0000 0000 0000 0000 0000 0000 0000
25 0000 0000 0000 0000 0000 0000 0000 0000 0000
26 0000 0000 0000 0000 0000 0000 0000 0000 0000
27 0000 0000 0000 0000 0000 0000 0000 0000 0000
28 0000 0000 0000 0000 0000 0000 0000 0000 0000
29 0000 0000 0000 0000 0000 0000 0000 0000 0000
30 0000 0000 0000 0000 0000 0000 0000 0000 0000
31 0000 0000 0000 0000 0000 0000 0000 0000 0000
32 0000 0000 0000 0000 0000 0000 0000 0000 0000
33 0000 0000 0000 0000 0000 0000 0000 0000 0000
34 0000 0000 0000 0000 0000 0000 0000 0000 0000
35 0000 0000 0000 0000 0000 0000 0000 0000 0000
36 0000 0000 0000 0000 0000 0000 0000 0000 0000
37 0000 0000 0000 0000 0000 0000 0000 0000 0000
38 0000 0000 0000 0000 0000 0000 0000 0000 0000
39 0000 0000 0000 0000 0000 0000 0000 0000 0000
40 0000 0000 0000 0000 0000 0000 0000 0000 0000
41 0000 0000 0000 0000 0000 0000 0000 0000 0000
42 0000 0000 0000 0000 0000 0000 0000 0000 0000
43 0000 0000 0000 0000 0000 0000 0000 0000 0000
44 0000 0000 0000 0000 0000 0000 0000 0000 0000
45 0000 0000 0000 0000 0000 0000 0000 0000 0000
46 0000 0000 0000 0000 0000 0000 0000 0000 0000
47 0000 0000 0000 0000 0000 0000 0000 0000 0000
48 0000 0000 0000 0000 0000 0000 0000 0000 0000
49 0000 0000 0000 0000 0000 0000 0000 0000 0000
50 0000 0000 0000 0000 0000 0000 0000 0000 0000
51 0000 0000 0000 0000 0000 0000 0000 0000 0000
52 0000 0000 0000 0000 0000 0000 0000 0000 0000
53 0000 0000 0000 0000 0000 0000 0000 0000 0000
54 0000 0000 0000 0000 0000 0000 0000 0000 0000
55 0000 0000 0000 0000 0000 0000 0000 0000 0000
56 0000 0000 0000 0000 0000 0000 0000 0000 0000
57 0000 0000 0000 0000 0000 0000 0000 0000 0000
58 0000 0000 0000 0000 0000 0000 0000 0000 0000
59 0000 0000 0000 0000 0000 0000 0000 0000 0000
60 0000 0000 0000 0000 0000 0000 0000 0000 0000
61 0000 0000 0000 0000 0000 0000 0000 0000 0000
62 0000 0000 0000 0000 0000 0000 0000 0000 0000
63 0000 0000 0000 0000 0000 0000 0000 0000 0000
64 0000 0000 0000 0000 0000 0000 0000 0000 0000
65 0000 0001 0000 0000 0106 0000 0000 0000 0000
66 0000 0855 0006 0000 1667 0000 0000 0000 0000
67 0000 1986 1288 0511 1998 0348 0001 0000 0024
68 0004 1998 1992 1979 2000 1950 0373 0457 1112
69 0034 1999 2000 1996 2000 1998 1765 1897 1974
70 1464 2000 2000 2000 2000 1999 1995 1998 2000
71 2000 2000 2000 2000 2000 2000 2000 1998 2000
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 0 </Byte> <Center> 36 </Center> <Right> 67 </Right> <Left> 6 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 1 </Byte> <Center> 34 </Center> <Right> 64 </Right> <Left> 4 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 2 </Byte> <Center> 34 </Center> <Right> 65 </Right> <Left> 4 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 3 </Byte> <Center> 34 </Center> <Right> 66 </Right> <Left> 3 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 4 </Byte> <Center> 35 </Center> <Right> 64 </Right> <Left> 6 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 5 </Byte> <Center> 36 </Center> <Right> 66 </Right> <Left> 7 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 6 </Byte> <Center> 35 </Center> <Right> 66 </Right> <Left> 5 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 7 </Byte> <Center> 36 </Center> <Right> 67 </Right> <Left> 5 </Left> </RxDqDqs>
<RxDqDqs> <DQS> N </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 8 </Byte> <Center> 36 </Center> <Right> 66 </Right> <Left> 6 </Left> </RxDqDqs>
Algorithm mode: working to update dqsP.

Basic read DQ/DQS summary for Rank:0 Channel:0 dqsP
---------------------------------

1 2 3 4 5 6 7 8 9
0 1999 1999 1999 1999 1999 1999 1999 1999 1999
1 1999 1999 1999 1999 1999 1999 1999 1999 1999
2 1999 1999 1999 1999 1999 1999 1999 1999 1999
3 1999 1999 1999 1999 1999 1999 1999 1999 1999
4 1999 1999 1999 1999 1999 1999 1999 1999 1999
5 1999 1999 1999 1999 1999 1999 1999 1999 1999
6 1999 1999 1999 1999 1999 1999 1999 1999 1999
7 0000 1360 1694 1922 1999 1999 1999 0002 1999
8 0000 0000 0000 0000 0000 0000 0000 0000 0000
9 0000 0000 0000 0000 0000 0000 0000 0000 0000
10 0000 0000 0000 0000 0000 0000 0000 0000 0000
11 0000 0000 0000 0000 0000 0000 0000 0000 0000
12 0000 0000 0000 0000 0000 0000 0000 0000 0000
13 0000 0000 0000 0000 0000 0000 0000 0000 0000
14 0000 0000 0000 0000 0000 0000 0000 0000 0000
15 0000 0000 0000 0000 0000 0000 0000 0000 0000
16 0000 0000 0000 0000 0000 0000 0000 0000 0000
17 0000 0000 0000 0000 0000 0000 0000 0000 0000
18 0000 0000 0000 0000 0000 0000 0000 0000 0000
19 0000 0000 0000 0000 0000 0000 0000 0000 0000
20 0000 0000 0000 0000 0000 0000 0000 0000 0000
21 0000 0000 0000 0000 0000 0000 0000 0000 0000
22 0000 0000 0000 0000 0000 0000 0000 0000 0000
23 0000 0000 0000 0000 0000 0000 0000 0000 0000
24 0000 0000 0000 0000 0000 0000 0000 0000 0000
25 0000 0000 0000 0000 0000 0000 0000 0000 0000
26 0000 0000 0000 0000 0000 0000 0000 0000 0000
27 0000 0000 0000 0000 0000 0000 0000 0000 0000
28 0000 0000 0000 0000 0000 0000 0000 0000 0000
29 0000 0000 0000 0000 0000 0000 0000 0000 0000
30 0000 0000 0000 0000 0000 0000 0000 0000 0000
31 0000 0000 0000 0000 0000 0000 0000 0000 0000
32 0000 0000 0000 0000 0000 0000 0000 0000 0000
33 0000 0000 0000 0000 0000 0000 0000 0000 0000
34 0000 0000 0000 0000 0000 0000 0000 0000 0000
35 0000 0000 0000 0000 0000 0000 0000 0000 0000
36 0000 0000 0000 0000 0000 0000 0000 0000 0000
37 0000 0000 0000 0000 0000 0000 0000 0000 0000
38 0000 0000 0000 0000 0000 0000 0000 0000 0000
39 0000 0000 0000 0000 0000 0000 0000 0000 0000
40 0000 0000 0000 0000 0000 0000 0000 0000 0000
41 0000 0000 0000 0000 0000 0000 0000 0000 0000
42 0000 0000 0000 0000 0000 0000 0000 0000 0000
43 0000 0000 0000 0000 0000 0000 0000 0000 0000
44 0000 0000 0000 0000 0000 0000 0000 0000 0000
45 0000 0000 0000 0000 0000 0000 0000 0000 0000
46 0000 0000 0000 0000 0000 0000 0000 0000 0000
47 0000 0000 0000 0000 0000 0000 0000 0000 0000
48 0000 0000 0000 0000 0000 0000 0000 0000 0000
49 0000 0000 0000 0000 0000 0000 0000 0000 0000
50 0000 0000 0000 0000 0000 0000 0000 0000 0000
51 0000 0000 0000 0000 0000 0000 0000 0000 0000
52 0000 0000 0000 0000 0000 0000 0000 0000 0000
53 0000 0000 0000 0000 0000 0000 0000 0000 0000
54 0000 0000 0000 0000 0000 0000 0000 0000 0000
55 0000 0000 0000 0000 0000 0000 0000 0000 0000
56 0000 0000 0000 0000 0000 0000 0000 0000 0000
57 0000 0000 0000 0000 0000 0000 0000 0000 0000
58 0000 0000 0000 0000 0000 0000 0000 0000 0000
59 0000 0000 0000 0000 0000 0000 0000 0000 0000
60 0004 0000 0000 0000 0000 0000 0000 0019 0000
61 1571 0000 0000 0000 0000 0000 0000 1476 0000
62 1995 0000 0000 0000 0000 0000 0000 1999 0000
63 2000 0000 0006 0000 0046 0000 0000 2000 0000
64 2000 1486 1731 1992 1891 0003 0000 2000 0000
65 2000 2000 2000 2000 2000 1995 1338 2000 0000
66 2000 2000 2000 2000 2000 2000 1999 2000 0005
67 2000 2000 2000 2000 2000 2000 2000 2000 1974
68 2000 2000 2000 2000 2000 2000 2000 2000 2000
69 2000 2000 2000 2000 2000 2000 2000 2000 2000
70 2000 2000 2000 2000 2000 2000 2000 2000 2000
71 2000 2000 2000 2000 2000 2000 2000 2000 2000
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 0 </Byte> <Center> 33 </Center> <Right> 59 </Right> <Left> 7 </Left> </RxDqDqs>
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 1 </Byte> <Center> 35 </Center> <Right> 63 </Right> <Left> 8 </Left> </RxDqDqs>
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 2 </Byte> <Center> 35 </Center> <Right> 62 </Right> <Left> 8 </Left> </RxDqDqs>
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 3 </Byte> <Center> 35 </Center> <Right> 63 </Right> <Left> 8 </Left> </RxDqDqs>
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 4 </Byte> <Center> 35 </Center> <Right> 62 </Right> <Left> 8 </Left> </RxDqDqs>
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Channel> <Rank> 0 </Rank> <Byte> 5 </Byte> <Center> 35 </Center> <Right> 63 </Right> <Left> 8 </Left> </RxDqDqs>
<RxDqDqs> <DQS> P </DQS> <Channel> 0 </Chaþ

Jason Leschnik · ‎03-19-2020

Checking internally it appears to be a DIMM failure.

Do you still have coverage on this? If so I'd raise a TAC case as it appears this issue is a straight RMA. If you don't have coverage on the box I'd recommend to see if you have budget and could get it first and get a replacement

<OR>

Non-official reply ;)

If you wanted to get dangerous you might be able to pull a module at a time and see if it fixes the issue. Ideally you really want to replace whatever the faulty DIMMs is with good ones (it could be one or all of the sticks). As the "Supervisor" is just an Intel Xeon motherboard you will find that the RAM is just off the shelf parts.

More than likely an 8192MB RDIMM DDR3 1333 MHz, but I would recommend checking on the stick itself. If you have some server guys ask them if they have any RDIMMs laying around... Also ensure you don't use a UDIMM or an FBDIMM.

GL HTH!

Regards,

Jason.