02-19-2012 08:45 AM - edited 03-04-2019 03:20 PM
I used to have a 877w in the same place and same setup as my current 887, this time though the DMT Bits Per Bin just will not populate on ADSL2+ altough it did work when it sync ADSL1 (same line/DSLAM, just came up ADSL for some reason).
Any Ideas? Its not a huge issue im just wondering.
car1#show dsl interface atm0
ATM0
Alcatel 20190 chipset information
ATU-R (DS) ATU-C (US)
Modem Status: Showtime (DMTDSL_SHOWTIME)
DSL Mode: ITU G.992.5 (ADSL2+) Annex A
ITU STD NUM: 0x03 0x2
Chip Vendor ID: 'STMI' 'GSPN'
Chip Vendor Specific: 0x0000 0x0010
Chip Vendor Country: 0x0F 0xFF
Modem Vendor ID: 'CSCO' 'GSPN'
Modem Vendor Specific: 0x0000 0x1000
Modem Vendor Country: 0xB5 0xFF
Serial Number Near: FTX142980A 887-SEC- 15.1
Serial Number Far: Chip ID: C196 (3) capability-enabled
DFE BOM: DFE3.0 Annex A (1)
Capacity Used: 84% 95%
Noise Margin: 14.5 dB 21.5 dB
Output Power: 20.5 dBm 12.5 dBm
Attenuation: 23.5 dB 8.0 dB
FEC ES Errors: 0 0
ES Errors: 1 10
SES Errors: 0 1
LOSES Errors: 0 1
UES Errors: 27 0
Defect Status: None None
Last Fail Code: None
Watchdog Counter: 0xC7
Watchdog Resets: 0
Selftest Result: 0x00
Subfunction: 0x00
Interrupts: 8780 (0 spurious)
PHY Access Err: 0
Activations: 2
LED Status: ON
LED On Time: 100
LED Off Time: 100
Init FW: init_AMR-5.0.007.bin
Operation FW: AMR-E-0.0.026.bin
FW Source: external
FW Version: 0.0.26
DS Channel1 DS Channel0 US Channel1 US Channel0
Speed (kbps): 0 14975 0 766
DS User cells: 0 471793
US User & Idle cells: 0 2170534
Reed-Solomon EC: 0 0 0 0
CRC Errors: 0 16 0 16
Header Errors: 0 13 0 1005
Total BER: 0E-0 33280E-0
Leakage Average BER: 0E-0 33280E-0
ATU-R (DS) ATU-C (US)
Bitswap: enabled enabled
LOM Monitoring : Disabled
DMT Bits Per Bin
Not able to get complete DMT bin information.Retry "show dsl" after few seconds.
DSL: Training log buffer capability is not enabled
02-19-2012 11:14 PM
Try updating IOS.
02-21-2012 05:08 AM
Currently running c880data-universalk9-mz.151-4.M3.bin, I guess I can try c880data-universalk9-mz.151-3.T3.bin..
EDIT:
Well c880data-universalk9-mz.151-3.T3.bin is loaded, and now I get this.
car1#show dsl interface atm0
ATM0
Alcatel 20190 chipset information
ATU-R (DS) ATU-C (US)
Modem Status: Showtime (DMTDSL_SHOWTIME)
DSL Mode: ITU G.992.5 (ADSL2+) Annex A
ITU STD NUM: 0x03 0x2
Chip Vendor ID: 'STMI' 'GSPN'
Chip Vendor Specific: 0x0000 0x0010
Chip Vendor Country: 0x0F 0xFF
Modem Vendor ID: 'CSCO' 'GSPN'
Modem Vendor Specific: 0x0000 0x1000
Modem Vendor Country: 0xB5 0xFF
Serial Number Near: FTX142980AR
Serial Number Far:
Modem VerChip ID: C196 (3) capability-enabled
DFE BOM: DFE3.0 Annex A (1)
Capacity Used: 87% 95%
Noise Margin: 13.5 dB 22.5 dB
Output Power: 20.0 dBm 12.5 dBm
Attenuation: 23.0 dB 8.0 dB
FEC ES Errors: 0 0
ES Errors: 1 0
SES Errors: 1 0
LOSES Errors: 1 0
UES Errors: 0 0
Defect Status: None None
Last Fail Code: None
Watchdog Counter: 0x78
Watchdog Resets: 0
Selftest Result: 0x00
Subfunction: 0x00
Interrupts: 4305 (0 spurious)
PHY Access Err: 0
Activations: 1
LED Status: ON
LED On Time: 100
LED Off Time: 100
Init FW: init_AMR-5.0.007.bin
Operation FW: AMR-E-0.0.026.bin
FW Source: external
FW Version: 0.0.26
DS Channel1 DS Channel0 US Channel1 US Channel0
Speed (kbps): 0 14975 0 766
DS User cells: 0 119277
US User & Idle cells: 0 1568751
Reed-Solomon EC: 0 0 0 0
CRC Errors: 0 52 0 2
Header Errors: 0 34 0 0
Total BER: 0E-0 26112E-0
Leakage Average BER: 0E-0 26112E-0
Interleave Delay: 0 41 0 50
ATU-R (DS) ATU-C (US)
Bitswap: enabled enabled
LOM Monitoring : Disabled
DMT Bits Per Bin
000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0
010: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
020: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
030: 0 0 2 0 0 0 7 0 0 0 0 0 0 0 0 0
040: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
050: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
060: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
070: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
080: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
090: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
0A0: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
0B0: 0 0 2 0 0 0 7 0 0 0 0 0 0 0 0 0
0C0: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0D0: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
0E0: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
0F0: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
100: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
110: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
120: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
130: 0 0 2 0 0 0 7 0 0 0 0 0 0 0 0 0
140: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
150: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
160: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0
170: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
180: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
190: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
1A0: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
1B0: 0 0 2 0 0 0 7 0 0 0 0 0 0 0 0 0
1C0: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1D0: 0 0 0 0 0 0 3 0 0 0 3 0 0 0 3 0
1E0: 0 0 3 0 0 0 3 0 0 0 3 0 0 0 3 0
1F0: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DSL: Training log buffer capability is not enabled
02-21-2012 06:04 AM
Very good, please remember to rate useful posts clicking on the stars below.
02-21-2012 06:08 AM
Well sorta, Sure I got the DNT Bits per Bin back, but they are completly wrong, if the line was that bad I wouldn't get the sync im getting.
02-21-2012 06:17 AM
Sorry, I didn't even looked. The next step would be logging a TAC case for cosmetic defect.
02-21-2012 06:02 PM
Turns out it is a knowen issues with no workaround on the current versions.
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