06-04-2014 04:55 AM - edited 03-04-2019 11:05 PM
Hi there,
I have been reading up on this but now i'm getting confused. My understanding so far is that CEF lookups increase layer 3 switching speed by making a copy of the routing tables next hops addresses and storing the information in the FIB and the mac addresses for the next hop interface is stored in the adjacency table both for fast lookups. Is the FIB table and adj table stored in the ASIC or does the ASIC just process the information?
My original research was to ascertain in which peice of hardware was the MPLS forwarding table stored, is this the same peice of hardware that the FIB table is stored in?
Solved! Go to Solution.
06-04-2014 08:16 AM
Hello Matt,
the route processor generates the FIB master copy that is then copied to locations in each linecard.
Each linecard can have multiple ASIC that access the local copy of the FIB. This happens in high end distributed architectures./platforms.
The TCAM ternary content addressable memory is a specialized type of memory that allows for efficient lookups of IP prefixes in the way it is organized and using the destination ip address as the search key.
Generally speaking, a software based router hosts the FIB in DRAM, TCAM are typically used in multilayer switch like C6500 or high end routers that have a distributed architecture.
And yes, the location of the LFIB the mpls forwarding table is the same, with the route processor building it and copies distributed to linecards. In this case the search key is an MPLS label not an IPv4 prefix.
see for C6500 architecture:
http://www.cisco.com/c/en/us/products/collateral/switches/catalyst-6500-series-switches/prod_white_paper0900aecd80673385.html
Hope to help
Giuseppe
06-04-2014 05:12 AM
I have just been reading up further on this, one article says that the route processor processes the FIB and not the ASIC?
Also the FIB is stored in the DRAM of the router, another article says the FIB is stored in the TCAM.
Can anyone clear this up for me, i will greatly appreciate getting a proper understanding on this.
Many Thanks!
06-04-2014 08:16 AM
Hello Matt,
the route processor generates the FIB master copy that is then copied to locations in each linecard.
Each linecard can have multiple ASIC that access the local copy of the FIB. This happens in high end distributed architectures./platforms.
The TCAM ternary content addressable memory is a specialized type of memory that allows for efficient lookups of IP prefixes in the way it is organized and using the destination ip address as the search key.
Generally speaking, a software based router hosts the FIB in DRAM, TCAM are typically used in multilayer switch like C6500 or high end routers that have a distributed architecture.
And yes, the location of the LFIB the mpls forwarding table is the same, with the route processor building it and copies distributed to linecards. In this case the search key is an MPLS label not an IPv4 prefix.
see for C6500 architecture:
http://www.cisco.com/c/en/us/products/collateral/switches/catalyst-6500-series-switches/prod_white_paper0900aecd80673385.html
Hope to help
Giuseppe
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