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Firmware Bug/damaged SG-350-10P

m00173
Level 1
Level 1

Hello, 

the firmware from my Cisco SG-350-10P-K9 V06 Switch is damaged.

 

When I send the firmware via X-modem, the download fails

What else can I do?

 

*******************************************************************

*** Running  SW  Ver. 2.5.5.47  Date May  6 2020  Time 17:25:42 ***

*******************************************************************

 

HW version is V06

Serial Number is PSZ24181CKX

Base Mac address is: 3c:57:31:d8:73:b7

Dram size is  : 512M bytes

Flash size is: 256M

06-May-2020 05:27:40 %CDB-I-LOADCONFIG: Loading running configuration.

06-May-2020 05:27:40 %CDB-I-LOADCONFIG: Loading startup configuration.

Device configuration:

Slot 1 - NSG350-10P

Device 0: CPSS_98DX3233 (AlleyCat3)

CPLD version is: 0x0e

CPU speed: 800 MHz

 

------------------------------------

-- Unit Factory Default           --

------------------------------------

 

06-May-2020 05:27:53 %INIT-I-InitCompleted: Initialization task is completed

-----------------------------------

-- Unit Number 1  Master Enabled --

-----------------------------------

 

06-May-2020 05:28:01 %MLDP-I-MASTER: Switching to the Master Mode.

06-May-2020 05:28:04 %SNMP-I-CDBITEMSNUM: Number of running configuration items                                                                                                                                                              loaded: 0

 

06-May-2020 05:28:04 %SNMP-I-CDBITEMSNUM: Number of startup configuration items                                                                                                                                                              loaded: 0

The SSH Server is generating a default RSA key.

This may take a few minutes, depending on the key size.

The SSH Server is generating a default DSA key.

This may take a few minutes, depending on the key size.

06-May-2020 05:28:05 %HAL_config_poe-F-POEInitError: HALP_config_poe_692xx_check                                                                                                                                                             _master_reset: HALP_config_poe_number_of_poe_devices is Zero. Failed on init.

 

***** FATAL ERROR *****

Reporting Task: HCPT.

Software Version: 2.5.5.47 (date May  6 2020 time 17:25:42)

base_address=0xb464d000

ros(+0x78dbc8)[0xb4ddabc8]

ros(HOSTG_fatal_error+0x10)[0xb4ddd47c]

ros(OSSYSG_fatal_error+0x2a0)[0xb53ae340]

ros(+0xb61f38)[0xb51aef38]

ros(HALP_config_poe_692xx_dev_op_set_periodic+0xa80)[0xb5768fb0]

ros(+0x110ca44)[0xb5759a44]

ros(HALP_config_poe_691xx_692xx_poe_dev_operation+0x3c)[0xb5759b24]

ros(HALC_config_poe_dev_operation+0x44)[0xb576c9ec]

ros(+0x10bd190)[0xb570a190]

ros(HALC_config_device_dispatch+0x1a8)[0xb570b110]

ros(+0x10da154)[0xb5727154]

ros(+0x10da364)[0xb5727364]

ros(+0x10da3ec)[0xb57273ec]

/lib/libp2linux.so.1(task_run+0xf4)[0xb45dd818]

 

***** END OF FATAL ERROR *****

 

**************************************************

*****************  SYSTEM RESET  *****************

**************************************************

Restarting system.

 

BootROM 1.41

Booting from NAND flash

General initialization - Version: 1.0.0

Serdes initialization - Version: 1.0.2

PEX: pexIdx 0, detected no link

DDR3 Training Sequence - Ver TIP-1.56.0

DDR3 Training Sequence - Switching XBAR Window to FastPath Window

Updated Physical Mem size is from 0x20000000 to 10000000

DDR3 Training Sequence - Ended Successfully

BootROM: Image checksum verification PASSED

 

 

ROS Booton: May 26 2019 14:16:26

 

Press x to choose XMODEM...

Booting from NAND flash

Running UBOOT...

U-Boot 2013.01 (May 06 2020 - 17:29:20) Marvell version: 2014_T3.0_eng_dropv6 2.                                                                                                                                                             5.5.1

Loading system/images/active-image ...

secure boot not supported

Uncompressing Linux... done, booting the kernel.

I2C frequency 100 kHz (Tclk 200 MHz, freq_m 12, freq_n 3)

 

MAC address   :  3c:57:31:d8:73:b7.

 

Autoboot in 2 seconds - press RETURN or Esc. to abort and enter prom.

 

*******************************************************************

*** Running  SW  Ver. 2.5.5.47  Date May  6 2020  Time 17:25:42 ***

*******************************************************************

 

HW version is V06

Serial Number is PSZ24181CKX

Base Mac address is: 3c:57:31:d8:73:b7

Dram size is  : 512M bytes

Flash size is: 256M

06-May-2020 05:27:12 %CDB-I-LOADCONFIG: Loading running configuration.

06-May-2020 05:27:12 %CDB-I-LOADCONFIG: Loading startup configuration.

Device configuration:

Slot 1 - SG350-10P

Device 0: CPSS_98DX3233 (AlleyCat3)

CPLD version is: 0x0e

CPU speed: 800 MHz

 

------------------------------------

-- Unit Number 1                  --

------------------------------------

 

06-May-2020 05:27:25 %INIT-I-InitCompleted: Initialization task is completed

 

 

-----------------------------------

-- Unit Number 1  Master Enabled --

-----------------------------------

 

06-May-2020 05:27:34 %MLDP-I-MASTER: Switching to the Master Mode.

06-May-2020 05:27:35 %Entity-I-SEND-ENT-CONF-CHANGE-TRAP: entity configuration change trap.

06-May-2020 05:27:36 %SNMP-I-CDBITEMSNUM: Number of running configuration items loaded: 0

 

06-May-2020 05:27:36 %SNMP-I-CDBITEMSNUM: Number of startup configuration items loaded: 0

The SSH Server is generating a default RSA key.

This may take a few minutes, depending on the key size.

06-May-2020 05:27:37 %HAL_config_poe-F-POEInitError: HALP_config_poe_692xx_check_master_reset: HALP_config_poe_number_of_poe_devices is Zero. Failed on init.

 

***** FATAL ERROR *****

Reporting Task: HCPT.

Software Version: 2.5.5.47 (date May  6 2020 time 17:25:42)

base_address=0xb4726000

ros(+0x78dbc8)[0xb4eb3bc8]

ros(HOSTG_fatal_error+0x10)[0xb4eb647c]

ros(OSSYSG_fatal_error+0x2a0)[0xb5487340]

ros(+0xb61f38)[0xb5287f38]

ros(HALP_config_poe_692xx_dev_op_set_periodic+0xa80)[0xb5841fb0]

ros(+0x110ca44)[0xb5832a44]

ros(HALP_config_poe_691xx_692xx_poe_dev_operation+0x3c)[0xb5832b24]

ros(HALC_config_poe_dev_operation+0x44)[0xb58459ec]

ros(+0x10bd190)[0xb57e3190]

ros(HALC_config_device_dispatch+0x1a8)[0xb57e4110]

ros(+0x10da154)[0xb5800154]

ros(+0x10da364)[0xb5800364]

ros(+0x10da3ec)[0xb58003ec]

/lib/libp2linux.so.1(task_run+0xf4)[0xb46b6818]

 

***** END OF FATAL ERROR *****

 

**************************************************

*****************  SYSTEM RESET  *****************

**************************************************

Restarting system.

 

BootROM 1.41

Booting from NAND flash

 

 

General initialization - Version: 1.0.0

Serdes initialization - Version: 1.0.2

PEX: pexIdx 0, detected no link

DDR3 Training Sequence - Ver TIP-1.56.0

DDR3 Training Sequence - Switching XBAR Window to FastPath Window

Updated Physical Mem size is from 0x20000000 to 10000000

DDR3 Training Sequence - Ended Successfully

BootROM: Image checksum verification PASSED

 

 

ROS Booton: May 26 2019 14:16:26

 

Press x to choose XMODEM...

Booting from NAND flash

 

Running UBOOT...

 

 

U-Boot 2013.01 (May 06 2020 - 17:29:20) Marvell version: 2014_T3.0_eng_dropv6 2.5.5.1

 

Loading system/images/active-image ...

secure boot not supported

Uncompressing Linux... done, booting the kernel.

I2C frequency 100 kHz (Tclk 200 MHz, freq_m 12, freq_n 3)

 

 

MAC address   :  3c:57:31:d8:73:b7.

 

Autoboot in 2 seconds - press RETURN or Esc. to abort and enter prom.

 

*******************************************************************

*** Running  SW  Ver. 2.5.5.47  Date May  6 2020  Time 17:25:42 ***

*******************************************************************

 

HW version is V06

Serial Number is PSZ24181CKX

Base Mac address is: 3c:57:31:d8:73:b7

Dram size is  : 512M bytes

Flash size is: 256M

06-May-2020 05:27:12 %CDB-I-LOADCONFIG: Loading running configuration.

06-May-2020 05:27:12 %CDB-I-LOADCONFIG: Loading startup configuration.

Device configuration:

Slot 1 - SG350-10P

Device 0: CPSS_98DX3233 (AlleyCat3)

CPLD version is: 0x0e

CPU speed: 800 MHz

 

 

1 Accepted Solution

Accepted Solutions

marce1000
VIP
VIP

 

    - FYIhttps://bst.cloudapps.cisco.com/bugsearch/bug/CSCvk62334  , 'workaround' mentioned in the bug report is RMA

 M.



-- ' 'Good body every evening' ' this sentence was once spotted on a logo at the entrance of a Weight Watchers Club !

View solution in original post

2 Replies 2

balaji.bandi
Hall of Fame
Hall of Fame

If you are not able to install firmware using xterm, then you need to raise a TAC case for replacemet.

 

BB

***** Rate All Helpful Responses *****

How to Ask The Cisco Community for Help

marce1000
VIP
VIP

 

    - FYIhttps://bst.cloudapps.cisco.com/bugsearch/bug/CSCvk62334  , 'workaround' mentioned in the bug report is RMA

 M.



-- ' 'Good body every evening' ' this sentence was once spotted on a logo at the entrance of a Weight Watchers Club !
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