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Enthusiast

Catalyst 9500-40X ASIC mappings

does anyone have the details ?

From the presentation below, you can see that there are 4 ASICs with 6 SFP+ each, for the 24x40GE switch.

Can i assume for the 40x10GE switch this will be:

ASIC 1: p1 - 12

ASIC 2 : p 13 - 24

ASIC 3 : p 25 - 36

ASIC 4 : p 37,38,39,40 + 8x10GE or 2x40Ge

 

regards,

Geert

 

1 ACCEPTED SOLUTION

Accepted Solutions
Highlighted
Enthusiast

Using this completely weirdo command:

 

show platform software fed switch 1 qos qsb interface Te1/0/13

 

QoS subblock information:
Name:TenGigabitEthernet1/0/13 iif_id:0x00000000000014 iif_type:ETHER(146)
qsb ptr:0x7f716ccc9918
Port type = Wired port
asic_num:2 is_uplink:false init_done:1
FRU events: Active-0, Inactive-0
trust_enabled:true trust_type:TRUST_DSCP ifm_trust_type:0
LE priority:13 LE tablemap handle(in, out): (0,0)
Stats (plc,q) export counters (in/out): 0/0
Policy Info:
Ingress Policy:nil
Egress Policy:nil
TCG(in,out):((nil), (nil))
Policer Info: Aggregate
Ingress policer block: Not allocated
Egress policer block: Not allocated
Instance Handle: Not allocated
Policer Info: Microflow
Ingress policer block: Not allocated
Egress policer block: Not allocated
Instance Handle: Not allocated
Queueing Info:
def_queuing = 0, shape_rate:0 interface_rate_kbps:10000000
Port shaper:false
lbl_to_qmap_index:0

 

 

 

i have been able to verify the above:

 

ports Te1/0/1 - 12 : ASIC 3

ports Te1/0/13 -24 : ASIC 2

ports Te1/0/25 - 36 : ASIC 1

ports Te1/0/37 - 40 : ASIC 0

ports Fo1/1/1 - Fo1/1/2 : ASIC 0

(or Te1/1/1 - Te1/1/8 : ASIC 0 : ASIC 0, same port breakout in 4x10GE)

 

so my assumption was correct :-)

 

View solution in original post

2 REPLIES 2
Highlighted
Enthusiast

Using this completely weirdo command:

 

show platform software fed switch 1 qos qsb interface Te1/0/13

 

QoS subblock information:
Name:TenGigabitEthernet1/0/13 iif_id:0x00000000000014 iif_type:ETHER(146)
qsb ptr:0x7f716ccc9918
Port type = Wired port
asic_num:2 is_uplink:false init_done:1
FRU events: Active-0, Inactive-0
trust_enabled:true trust_type:TRUST_DSCP ifm_trust_type:0
LE priority:13 LE tablemap handle(in, out): (0,0)
Stats (plc,q) export counters (in/out): 0/0
Policy Info:
Ingress Policy:nil
Egress Policy:nil
TCG(in,out):((nil), (nil))
Policer Info: Aggregate
Ingress policer block: Not allocated
Egress policer block: Not allocated
Instance Handle: Not allocated
Policer Info: Microflow
Ingress policer block: Not allocated
Egress policer block: Not allocated
Instance Handle: Not allocated
Queueing Info:
def_queuing = 0, shape_rate:0 interface_rate_kbps:10000000
Port shaper:false
lbl_to_qmap_index:0

 

 

 

i have been able to verify the above:

 

ports Te1/0/1 - 12 : ASIC 3

ports Te1/0/13 -24 : ASIC 2

ports Te1/0/25 - 36 : ASIC 1

ports Te1/0/37 - 40 : ASIC 0

ports Fo1/1/1 - Fo1/1/2 : ASIC 0

(or Te1/1/1 - Te1/1/8 : ASIC 0 : ASIC 0, same port breakout in 4x10GE)

 

so my assumption was correct :-)

 

View solution in original post

Highlighted

I Think you need to change the Switch model Description because for 9500-40X there are only 2 ASIC.

Below are ASIC details:

Port 1-24 is supported by ASIC 1
Port 25-40 is supported by ASIC 0
Network Module (C9500-NM-8X) is supported by ASIC0  

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