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Ask the Expert: Cisco Nexus 3000 Series Switches


This session provides an opportunity to learn and ask questions about Cisco Nexus 3000 Series Switches hardware architecture and their role in Data Center / Enterprise switching design, configuration and troubleshooting.

Cisco Nexus 3000 Series Switches extend Cisco Unified Fabric to the data center. Highly programmable, these low-latency switches offer simplified management, enhanced network visibility, advanced monitoring features, and wire-speed Layer 2 and 3 switching for data center top-of-rack (ToR) deployments. These highly programmable, cost-effective, deliver flexible port densities and low power consumption for data centers.


Ask questions from Monday, September 21 to Friday, October 2nd, 2015

Featured Experts

Vikash Kumar is a Customer support engineer in High-Touch Technical Services (HTTS) team supporting Data center Products. His areas of expertise include Cisco Nexus 9000, Nexus 7000/7700 , Nexus 5000, Nexus 3000, Nexus 2000, UCS, and MDS SAN Switches. Kumar has over 6 years of industry experience working with large enterprise and Service Provider networks. He has delivered several internal and external trainings on Datacenter technologies and created external documents on Datacenter products and technologies. He holds Bachelors in Information Technologies and PGDM in Cyber security from IMT Ghaziabad, India and these Cisco  certifications: CCNA, CCNP (Routing and Swtiching), CCNP (security) and he is triple CCIE (#27857) (in R&S, Security and Datacenter). He is pursuing for CCDE




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Yes dual sided vpc is supported on n3k.



Vikash kumar



we are relating problems using the Dual Sided Vpc topology beetween a pair of 7K (VPC domain 1) release 5.2(5) and 3K (Vpc domain 2) release 6.0(2)A6(7) as the attach pictures.

Can you confirm that this enviroment is supported beetween the 3K to 7K?

Please explain if ther are any kind of limitations.

Thank you

Cisco Employee

Hi Vikash,

I hope you will help me for below.

we are experiencing this following error on one of our customer N3k switch.

L3-QS2 %USER-3-SYSTEM_MSG: bcm_usd_isr_switch_event_cb:431: slot_num 0, event 2, memory error type 0x1, mem addr 0x17789, cause bit 0x10020a8 - bcm_usd




Thanks for your post, i understood from the error that you are experiencing parity error on the switch as following:

L3-QS2 %USER-3-SYSTEM_MSG: bcm_usd_isr_switch_event_cb:431: slot_num 0, event 2, memory error type 0x1, mem addr 0x17789, cause bit 0x10020a8 - bcm_usd

This error Message is an indicator of memory parity error on Tuscany ASIC. This particular block is responsible for rate limiting of incoming traffic.

A parity error can happen in all type of RAM, regardless of the manufacturing. There aretwo kinds of parity errors:

Soft parity errors:
These errors occur when an energy level within the chip (for example, a one or a zero) changes, most often due to radiation. When referenced by the CPU, such errors cause the system to crash. In case of a soft parity error, there is no need to swap the board or any of the components.

Hard parity errors:
These errors occur when there is a chip or board failure that corrupts data. In this case, you need to re-seat or replace the affected component, which usually involves a memory chip swap or a board swap.

At the first occurrence it is not possible to distinguish between a soft or hard parity errors. From experience, most parity occurrences are soft parity errors, and you can usually dismiss them. Studies have shown that soft parity errors are 10 to 100 times more frequent than hard parity errors. Therefore, Cisco highly recommends you to wait for a second parity error on that particular affected component before you replace anything. This greatly reduces the impact on your network.

There are two cause bits that we have seen related to the error message we are observing on N3k.

        a) 0x1002173 - L3_Entry
        b) 0x10020a8 - L2_Entry

IN your case you have the parity error occurring in L2 Entry

bcm_usd_isr_switch_event_cb:431: slot_num 0, event 2, memory error type 0x1, mem adde 0x417e, cause bit 0x10020a8  - bcm_usd  >>> L2_Entry table, index 16766

This message indicates that there has been a single bit parity error for the given index in the specified table. Currently, L2_Entry (CAM), L3_Entry (Host) and L3_Defip (LPM) only have capacity to detect and report single bit parity error. There is nothing special about parity errors, these are inherent to silicon.

As part of the effort to get the switch to correct these parity errors by itself , the following commands were introduced in the code you are running .

Action Plan:
These CLIs has to be enabled and system should be rebooted with config save, to have these CLIs effective.

L2 Entry Table CLI:

hardware profile parity-error l2-table clear
hardware profile parity-error l2-table clear-and-disable ------> hidden command

L3 Entry Table CLI:

hardware profile parity-error l3-table Clear
hardware profile parity-error l3-table Clear-and-disable -------> hidden command


Clear: Clears corresponding table entry (with 0s)
Clear-and-disable: Clears corresponding table entry (with 0s) and disables Parity Checking on corresponding Table.a


should you be having any further query in this regards, please feel free to revert back.

Thanks !

Vikash kumar


What are the most common effects of soft parity errors on n3100? Packet drops? 


Hi Vikash

i have 3 servers and data storage , VMware running on it as cluster; i need switch support ISCSi , so if the followinf part No. support it or not :


and what is your recommendations for me


Hi Vikas, Can I use the Nexus 3100 in our customer's enterprise collapsed core  

We have 2960X at access , with all 10 G  uplinks. Set up is for around 5000 users . 


Hi Vikash,


We have an 7k and 5K fabricpath architecture and we are now deploying 3k can you please advise what would be the better way to connect the 3k to this network. 3K -- 5K or 3K --7K

7K is our core sw and 5k doing L2 function






Are the Nexus 3172 fully supporting 802.1x ?

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