Any other thoughts please??   thanks! ... View more

Hi ,   yes that is being considered a possible threat if we do this without caution. i'm thinking doing it on TFTP servers since they only provide minimal service/system utilization. Really appreciate your thoughts. we can also have others sides too but im really looking into some sort of documentation about this, if not directly but perhaps a recommended threshold for # ccmadmin users active sessions before it goes unresponsive. ... View more

thanks Dennis, One last question for the admin caused logs, could it also be caused by network outage and causing the mgcp pri to switch to h323? ... View more

Thanks but the question is just how to identify updown logs that's triggered by PSTN carrier and updown logs triggered by network issue considering gateway runs on MGCP connection. Any ideas?? ... View more

Here it is.. what is it you're looking for? i'm suspecting the above difference between %LINK-5-CHANGED (network issue) vs %LINK-3-UPDOWN (telco issue) E1 0/2/0 is up.   Applique type is Channelized E1 - balanced   Description:   No alarms detected.   alarm-trigger is not set   Version info FPGA Rev: 08121917, FPGA Type: PRK4   Framing is CRC4, Line Code is HDB3, Clock Source is Line.   International Bit: 1, National Bits: 11111   Data in current interval (71 seconds elapsed):      0 Line Code Violations, 0 Path Code Violations      0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins      0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs   Total Data (last 24 hours)      0 Line Code Violations, 330 Path Code Violations,      0 Slip Secs, 6 Fr Loss Secs, 0 Line Err Secs, 1 Degraded Mins,      7 Errored Secs, 5 Bursty Err Secs, 2 Severely Err Secs, 2147417995 Unavail Secs E1 0/2/1 is up.   Applique type is Channelized E1 - balanced   Description:   No alarms detected.   alarm-trigger is not set   Version info FPGA Rev: 08121917, FPGA Type: PRK4   Framing is CRC4, Line Code is HDB3, Clock Source is Line.   International Bit: 1, National Bits: 11111   Data in current interval (72 seconds elapsed):      0 Line Code Violations, 0 Path Code Violations      0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins      0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs   Total Data (last 24 hours)      0 Line Code Violations, 314 Path Code Violations,      0 Slip Secs, 5 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,      8 Errored Secs, 6 Bursty Err Secs, 2 Severely Err Secs, 2147418015 Unavail Secs E1 0/2/2 is up.   Applique type is Channelized E1 - balanced   Description:   No alarms detected.   alarm-trigger is not set   Version info FPGA Rev: 08121917, FPGA Type: PRK4   Framing is CRC4, Line Code is HDB3, Clock Source is Line.   International Bit: 1, National Bits: 11111   Data in current interval (75 seconds elapsed):      0 Line Code Violations, 0 Path Code Violations      0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins      0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs   Total Data (last 24 hours)      0 Line Code Violations, 344 Path Code Violations,      0 Slip Secs, 12 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,      16 Errored Secs, 4 Bursty Err Secs, 5 Severely Err Secs, 2147418015 Unavail Secs E1 0/2/3 is up.   Applique type is Channelized E1 - balanced   Description:   No alarms detected.   alarm-trigger is not set   Version info FPGA Rev: 08121917, FPGA Type: PRK4   Framing is CRC4, Line Code is HDB3, Clock Source is Line.   International Bit: 1, National Bits: 11111   Data in current interval (103 seconds elapsed):      0 Line Code Violations, 0 Path Code Violations      0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins      0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs   Total Data (last 24 hours)      0 Line Code Violations, 448 Path Code Violations,      0 Slip Secs, 5 Fr Loss Secs, 0 Line Err Secs, 1 Degraded Mins,      7 Errored Secs, 5 Bursty Err Secs, 2 Severely Err Secs, 2147418002 Unavail Secs E1 0/3/0 is up.   Applique type is Channelized E1 - balanced   Description:   No alarms detected.   alarm-trigger is not set   Version info FPGA Rev: 08121917, FPGA Type: PRK4   Framing is CRC4, Line Code is HDB3, Clock Source is Line.   International Bit: 1, National Bits: 11111   Data in current interval (104 seconds elapsed):      0 Line Code Violations, 0 Path Code Violations      0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins      0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs   Total Data (last 24 hours)      0 Line Code Violations, 299 Path Code Violations,      0 Slip Secs, 8 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,      11 Errored Secs, 5 Bursty Err Secs, 0 Severely Err Secs, 2147418017 Unavail Secs ... View more

thanks a lot for this!! the best! Paul ... View more

Thanks Amanso, appreciate it. i think it's worth a try.. and hopefully fixes it. thank you ... View more