When running the hardware diag image and hit "Hang on Gdo1_4" for RF test case #7, this indicate that write to the cc1200 register is timing out (MCU is waiting for the GDO1 (SPI MISO) signal to go low before it can write). There could be few places to check for cause of such error: 1. make sure there is no solder issue of the board. 2. make sure the crystal is stable. Basing on the data sheet of or the write and read operation of cc1200, it is said that " When CSn is pulled low, the MCU must wait until CC120X SO pin(GDO1) goes low before starting to transfer the header byte. This indicates that the crystal is stable. Unless the chip was just reset or was in SLEEP or XOFF state, or the XOSC configuration has been altered, the SO pin will always go low immediately after pulling CSn low. ... View more

How to add user to the access group.docx ... View more

iox-services-alpha-0.9.4.tar ... View more

T he EUI64 is composed of 8 bytes ( https://standards.ieee.org/develop/regauth/tut/eui64.pdf ), for the CGE reference design, the values of first three bytes is fixed for Cisco's boards, byte0=0x00, byte1=0x17, byte2=0x3B . Vendor should use their own OUI value. The rest five bytes is either configured by cfgwriter (please see detail of cfgwriter READ ME) or read from MCU’s 96-bit unique device identifier. The 96-bit unique device identifier of Contex-M3 is located at base address 0x1FFF7A10,  its last 40 bits(bit39:0) are selected as the last five bytes of EUI64, byte3 = bit39:32, byte4 = bit31:24, byte5 = bit23:16, byte6 = bit15:8, byte7 = bit7:0 (showed as pic at last).            For example, if one of the endpoint’s 96-bit unique device identifier is 0x33363136303247 0800410037 (bit95~0), the EUI64 of the endpoint would be 00173B 0800410037 .   ... View more

DMOGUIBundleiotvizconf_V2.tar.gz ... View more

dmo_15apr2016_hyundai_agent_7aef0a.zip ... View more

DMOJan15.zip ... View more

Why no more 100pin (Banshee) design 1.            The crystals and load capacitors that are specified on Banshee(100 pin design) do not meet the gain margin specifications recommended by ST.   As a result, the external 32.768kHz and 25.0MHz oscillators (LSE and HSE respectively) may not start up reliably. 2.            The TI TPS7A4501 LDO regulator was discovered to have low phase margin (~20deg) which can cause ringing on the 4V RF supply during a transient load change. Power engineer would like to see 45deg to 60deg of phase margin to avoid potential oscillations under temperature and tolerance variations. TI has confirmed this issue using their own evaluation board and can reproduce the behavior that we're seeing on the Cisco boards.   End result is TPS7A4501 is NOT recommended for use with the reference design. 3. R23, R86 should be BOM=NONE 4. We changed Y2 to Epson TG-5021CG-39N 38.88MHz TCXO because the 40MHz TCXO was causing ~6dB desense on channel 44. 5. Recommend changing SKY65313 VPC voltage divider to 1k/2.2k instead of 10k/22k (R93/R99) if it doesn't negatively impact the outage lifetime on their device.   This is because of feedback from one of the RF engineers "The impedance of the VPC pin changes when transmitting and the higher resistance divider lets the VPC pin voltage move around.   We found the power rise time changed and when you look at the VPC voltage versus time and the tx power versus time there was variation when using the 10k/22k resistors. After changing to the 1k/2.2k resistors, the VPC voltage is well behaved.   During rfdvt over temp we found the change was required." More detail on #1: #################################################################################################### Nneed to verify that your crystals meet the following requirements (I can’t tell from the spreadsheet what the p/n are): a) Verify the choice of crystal and load caps meet the requirements specified in the AN2867 Oscillator Design Guide. Gm is 5 mA/V for the HSE and 2.8 μA/V for LSE. From the guide:     "A gain margin of 5 can be considered as a minimum to ensure an efficient startup of oscillations." b) Verify the choice of crystal and load caps meet the following requirements specified in section 5.3.8 of the STM32 datasheet: High Speed Oscillator (25.0MHz):     "For CL1 and CL2, it is recommended to use high-quality external ceramic capacitors in the 5 pF to 25 pF range (typ.), designed for high-frequency applications, and selected to match the requirements of the crystal or resonator (see Figure 29). CL1 and CL2 are usually the same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2. PCB and MCU pin capacitance must be included (10 pF can be used as a rough estimate of the combined pin and board capacitance) when sizing CL1 and CL2." Low Speed Oscillator (32.768KHz):     "For CL1 and CL2 it is recommended to use high-quality external ceramic capacitors in the 5 pF to 15 pF range selected to match the requirements of the crystal or resonator (see Figure 30). CL1 and CL2, are usually the same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2.     Load capacitance CL has the following formula: CL = CL1 x CL2 / (CL1 + CL2) + Cstray where Cstray is the pin capacitance and board or trace PCB-related capacitance. Typically, it is between 2 pF and 7 pF.     To avoid exceeding the maximum value of CL1 and CL2 (15 pF) it is strongly recommended to use a resonator with a load capacitance CL <= 7 pF. Never use a resonator with a load capacitance of 12.5 pF." Recommended components: Our initial testing has shown that the following crystal and load capacitor pairs provide good results (the CL values are dependent upon PCB capacitance Cstray and should be tuned based upon the actual board layout). 32.768kHz:     Epson MC-306 32.7680K-E:PURE SN (CPN 19-1373-02)     CL=4.7pF: Kemet C0402C479D5GAC (CPN 11-1795-02) 25.0MHz:     Epson TSX-3225-25.000MF20X-AJ (CPN 19-2514-01)     CL=8.2pF: Murata GRM1555C1H8R2DA01 (CPN 11-1990-02) More detail on #2 ################################################################################ The TI recommended TPS7A4501 LDO regulator was discovered to have low phase margin (~20deg) which can cause ringing on the 4.0V RF rail during a transient load change. Power engineer would like to see 45deg to 60deg of phase margin to avoid potential oscillations under temperature and tolerance variations. TI has confirmed this issue using their own evaluation board and can reproduce the behavior that we're seeing on the Cisco boards.  TI recommends replacing with TPS7A8300 (not pin-compatible).  TI has also tested TPS78601 at 4.3V output with a 22uF 6.3V output capacitor and 75k/30.1k feedback resistors. TI had to add a 22pF feed-forward capacitor across the top feedback resistor in order to provide enough phase margin for stability. Your PCB doesn’t have the footprint for the feed forward capacitor on the layout.  ... View more

Original question: What is the acceptable maximum ripple on the 4.3V supply voltage? Will 5% at 120Hz. Is that fine for the Radio? What are the limits of the radio supply wise? Answer: The bias inside the chip should remove most of the ripple but the VCC1 and VCC2  are collector VCCs.  There will be some side band at +/- 120 Hz.  These side band are generated at the transceiver and FEM.  The best answer would be the see the effect on the packet error rate. The max VCC rating is 5 volts on the SKY65313. Suggest to test the PER on the overall system to see if the ripple produce an effect. ... View more

Here is the installation guide: Cisco IR829 Industrial Integrated Services Router Hardware Installation Guide - Cisco ... View more

CGR GOS 1.30 ... View more

app-sensorbot_sc-ver-1.0.zipapp-sensorbot_sc-ver-1.0.zip ... View more

High Level Calculation of CGE power consumption: STM32: 72mA @ 3.3V (Run mode, all periperals enabled, 120MHz fHCLK, TA=105degC) CC1200: 46mA @ 3.3V (RF TX) SKY65313: 826mA @ 4.3V (RF TX) 38.88MHz TCXO: ~2mA + additional couple mA for pull-up/downs, LEDs, etc. Some basic test of the power consumption has been performed, with below as reference: Essentially there are 3 main power consumers in the reference design: 3.3V supply to STM32 MCU 3.3V supply to RF chipset 5V supply to RF chipset (regulated down to 4.3V via LDO) First I performed some RMS current measurements on each supply during idle, receive, and transmit using the “RFTest” firmware. 3.3V MCU 3.3V RF 5V RF Idle 43mA 16mA 2.7mA Receive 43mA 39mA 2.7mA Transmit (mode 1) 43mA 62mA 710mA In demo mode, the current profile on the 5V RF supply during the transmission is measured,  the current transient lasts 535.8ms and the RMS current consumed 668.8mA during the transmission. Below is the current profile for the 3.3V RF supply during the transmission of the same packets.  About 60mA RMS during transmission, and about 38mA RMS while not transmitting (i.e. receive mode). And here’s the current profile for the 3.3V MCU over a 10s period running the same firmware.  It’s about 42mA RMS on average. current consumed by other mesh data transmissions will be highly dependent upon the # of packets, packet length, transmission duty cycle, sync schedule, etc, current consumed by other mesh data transmissions will be highly dependent upon the # of packets, packet length, transmission duty cycle, sync schedule, etc, ... View more