06-06-2018 11:25 AM - edited 03-01-2019 05:34 AM
Hi,
I'm trying to figure out the ASIC architecture on these devices, but can't seem to find what I'm looking for in the Cisco documentation. I was able to find that info for the 9300-EX but nothing on the 9336C-FX2
Is it using ASE2, ASE3, or LSE? How many buffer slices it has and what it the relationbetween the slices and the physical ports [18 port per slice (2 slices), 9 ports per slice (4slices), etc]? Planning on running in NX-OS mode.
Solved! Go to Solution.
06-07-2018 02:48 PM
The ACI scalability guide has a mapping of switch models to ASIC family.
9336C-FX2 is LSE.
06-07-2018 02:48 PM
The ACI scalability guide has a mapping of switch models to ASIC family.
9336C-FX2 is LSE.
06-07-2018 03:58 PM
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