ā06-02-2015 04:58 PM
hello everyone, I am facing CRC error log twice a day...
this issues had occured on module 5 which is WS-X6582-2PA
plz analyse this log
SLOT 5/0: May 15 11:02:26.736 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: May 17 21:53:58.257 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: May 18 15:17:24.118 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: May 26 21:15:35.940 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: May 30 10:31:29.114 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: May 30 15:57:13.294 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: Jun 1 14:45:31.374 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
SLOT 5/0: Jun 1 14:45:31.430 KST: %CPU_INTF_FPGA-2-INT: Backplane Bus Asic Transmit packet crc error [sts 0x0 sts1 0x0 reg0 0xCAFE reg1 0xCAFE reg2 0xCAFE reg3 0xC
thank you
ā06-02-2015 07:50 PM
ā06-02-2015 08:17 PM
thank you for the answer do you know the workaround to solve the issue??
ā06-02-2015 08:28 PM
The bug states a series of commands will generate the crc error. Are the commands that are referenced in the bug being entered when the crc error is occurring?
if not I would open a Tac case. Does sound like a bug.
There is not a work around listed under the bug.
ā06-02-2015 08:33 PM
you are so kind!!
u don need to open the case Let me figure this out...
thank you so much once again!!!
ā06-02-2015 08:37 PM
Your welcome.
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