How to display the EOBC error counters in the Catalyst 6500 series switches and a definition of the EOBC interfacec

[TCC_2]

Solution

The Ethernet Out of Band Channel (EOBC) is a half duplex channel that services many functions, which include the Simple Network Management Protocol (SNMP) and the packets that are destined for the switch. In order to ensure constant communication, some keep-alives run over the EOBC.

When several keep-alives are missed, it means communication is lost between the Application-Specific Integrated Circuit (ASIC) and the supervisor. In order to prevent this, the code contains a workaround that resets the EOBC when it sees that the messages do not increment constantly.

In switches, a counter called tx_head is constantly monitored. If this counter does not move, it is declared that the EOBC is stuck. At this point, the EOBC resets.

This problem usually occurs due to these circumstances:

• The EOBC channel fills with messages because of a storm of SNMP traffic. This occurs because it is a half duplex channel and is subject to collisions. When this happens, the EOBC can lack the time that is needed in order to transmit keepalives.
  
• A bad ASIC or a bad backplane exists. If this is the case, these messages appear constantly in intervals of three seconds or less.

In order to display information about the EOBC interface, use the show eobc command.

[Vishnu Asok]

For your immediate viewing pleasure. Notice the TX_head count value in both the outputs taken at few seconds interval.

Router>sh clock
*12:08:57.699 UTC Sat May 14 2011
Router>sh eobc
Interface information:
        Interface EOBC0/0 (idb = 0x47E62264)
        Hardware is Mistral EOBC (revision 5)
        Address is 0000.1600.0000 (bia 0000.1600.0000)
        Encap size         = 14         hardware status  = 0x210840
        IDB type           = 18         IDB state        = 4
        Encap type         = 0x1        Span encap size  = 0
        Error threshold    = 5000       Error count      = 0

Counters:
        rxring             = 0x921D940  rx ring entries       = 512
        rx_head            = 319        rx_tail               = 0
        inputs             = 29827      rx_cumbytes           = 3096364
        hw inputs          = 0          hw rx_cumbytes        = 0
        rx rate (bits/sec) = 2000       rx rate (packets/sec) = 4
        rx_buf_unavail     = 0          rx input drops        = 0
        input broadcast    = 0          input resource        = 0
        input error        = 0          input giants          = 0
        input crc          = 0          rx illegal length     = 0
        rxr eobc shadow    = 0x47F6F960 txr eobc shadow       = 0x50ADB290

        txring             = 0x921F980  tx ring entries       = 0x200
        tx_head            = 486        tx_tail               = 486 <--------------------------------------------------TX_Head

Router>sh clock
*12:09:08.675 UTC Sat May 14 2011
Router>sh eobc
Interface information:
        Interface EOBC0/0 (idb = 0x47E62264)
        Hardware is Mistral EOBC (revision 5)
        Address is 0000.1600.0000 (bia 0000.1600.0000)
        Encap size         = 14         hardware status  = 0x210840
        IDB type           = 18         IDB state        = 4
        Encap type         = 0x1        Span encap size  = 0
        Error threshold    = 5000       Error count      = 0

Counters:
        rxring             = 0x921D940  rx ring entries       = 512
        rx_head            = 343        rx_tail               = 0
        inputs             = 29851      rx_cumbytes           = 3098380
        hw inputs          = 0          hw rx_cumbytes        = 0
        rx rate (bits/sec) = 1000       rx rate (packets/sec) = 2
        rx_buf_unavail     = 0          rx input drops        = 0
        input broadcast    = 0          input resource        = 0
        input error        = 0          input giants          = 0
        input crc          = 0          rx illegal length     = 0
        rxr eobc shadow    = 0x47F6F960 txr eobc shadow       = 0x50ADB290

        txring             = 0x921F980  tx ring entries       = 0x200
        tx_head            = 509        tx_tail               = 509<--------------------------------------------TX_head

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