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LLDP for UPOE

Chris Isaacson
Level 1
Level 1

Hi,

To request more power from a cisco switch (POE+ or UPOE),

the LLDP protocol is required.

I am developing this protocol for a new board.

My LLDPPDU consists of chassis-id, port-id, port-description,system-name,

system-description, UPOE LLDP TLV

Here is what the switch console output shows when it receives a LLDP frame

*Jul 23 22:16:24.693: LLDP advertisement packet RX'd on intf GigabitEthernet1/0/

3

*Jul 23 22:16:24.693: LLDP rx state on GigabitEthernet1/0/3 set to RX FRAME

*Jul 23 22:16:24.693: LLDP unknown tlv type 127 recd - ignoring it

*Jul 23 22:16:24.693: LLDP malformed optional TLV 127 found - ignored

*Jul 23 22:16:24.693: LLDP unknown tlv type 127 recd - ignoring it

*Jul 23 22:16:24.693: LLDP malformed optional TLV 127 found - ignored

*Jul 23 22:16:24.693: LLDP rx state on GigabitEthernet1/0/3 set to WAIT FOR FRAM

E

Switch#show lldp entry *

Capability codes:
    (R) Router, (B) Bridge, (T) Telephone, (C) DOCSIS Cable Device
    (W) WLAN Access Point, (P) Repeater, (S) Station, (O) Other
------------------------------------------------
Chassis id: b043.5df0.f0f8
Port id: NLC-010-32
Port Description: Port description
System Name: System name

System Description:
System description

Time remaining: 112 seconds
System Capabilities: O
Enabled Capabilities: O
Management Addresses:
    Other: 42 30 2D 34 33 2D 35 44 2D 46 30 2D 46 30 2D 46 38 00
Auto Negotiation - not supported
Physical media capabilities - not advertised
Media Attachment Unit type - not advertised
Vlan ID: - not advertised


Total entries displayed: 1
Switch#

*Jul 23 22:16:24.693: LLDP advertisement packet RX'd on intf GigabitEthernet1/0/
3
*Jul 23 22:16:24.693: LLDP rx state on GigabitEthernet1/0/3 set to RX FRAME
*Jul 23 22:16:24.693: LLDP unknown tlv type 127 recd - ignoring it
*Jul 23 22:16:24.693: LLDP malformed optional TLV 127 found - ignored
*Jul 23 22:16:24.693: LLDP unknown tlv type 127 recd - ignoring it
*Jul 23 22:16:24.693: LLDP malformed optional TLV 127 found - ignored
*Jul 23 22:16:24.693: LLDP rx state on GigabitEthernet1/0/3 set to WAIT FOR FRAM
E

and the command

Switch#show lldp entry *

Capability codes:
    (R) Router, (B) Bridge, (T) Telephone, (C) DOCSIS Cable Device
    (W) WLAN Access Point, (P) Repeater, (S) Station, (O) Other
------------------------------------------------
Chassis id: b043.5df0.f0f8
Port id: NLC-010-32
Port Description: Port description
System Name: System name

System Description:
System description

Time remaining: 112 seconds
System Capabilities: O
Enabled Capabilities: O
Management Addresses:
    Other: 42 30 2D 34 33 2D 35 44 2D 46 30 2D 46 30 2D 46 38 00
Auto Negotiation - not supported
Physical media capabilities - not advertised
Media Attachment Unit type - not advertised
Vlan ID: - not advertised


Total entries displayed: 1
Switch#

//high power via MDI (Cisco)
#define LLDP_HPWR_MDI_TYPE 127 //7bits
#define LLDP_HPWR_MDI_LEN 12 //TLV information string
#define LLDP_HPWR_MDI_SUBTYPE 2 //8bits, 802.3
#define LLDP_HPWR_MDI_SUPPORT 0x0C //8bits, MDI power support (selection,enabled,supported,PD)
#define LLDP_HPWR_MDI_PSEPAIR 0x03 //8bits, PSE power pair (power via 1-2/3-6 and/or 4-5/7-8)
#define LLDP_HPWR_MDI_CLASS 4 //8bits, power class (to request high power)
#define LLDP_HPWR_MDI_PRIO 100 //8bits, source priority (100 = highest priority ??)
#define LLDP_HPWR_MDI_REQUEST 30 //16bits, PD power request, want to request 60W (must wait for switch advertisement?)
#define LLDP_HPWR_MDI_GRANT 0 //16bits, PSE power granted (field set by switch)

char LLDP_HPWR_MDI_OUI[] = {0xb0,0x43,0x5d};

//UPOE power via MDI (Cisco)
//A new LLDP TLV, 4-wire Power-via-MDI TLV, is introduced for UPOE. This TLV is present in the LLDP
//packet in all modes of operation, that is, 802.3af, 802.3at, and beyond. The PD can use this TLV to
//advertise its 4-pair related capabilities and requirements to the PSE; the PSE can power the PD
//accordingly.
#define LLDP_UPOE_MDI_TYPE 127 //7bits
#define LLDP_UPOE_MDI_LEN 5 //TLV information string
#define LLDP_UPOE_MDI_SUBTYPE 1 //8bits, Cisco OUI subtype
#define LLDP_UPOE_MDI_CAP 0x05 //8bits, PSE spare pair operational, PD spare pair enabled,
                                 //       no spare pair detection, 4pair support
char LLDP_UPOE_MDI_OUI[] = {0x00,0x01,0x42};

The only 2 TLV's with type 127 are

    // UPOE LLDP TLV
    printf("Add UPOE LLDP TLV\n");
    if (!(
        START_LLDP_TLV(LLDP_UPOE_MDI_TYPE) &&
        PUSH_UINT8(LLDP_UPOE_MDI_LEN) &&
        PUSH_BYTES(LLDP_UPOE_MDI_OUI, OUI_LEN) &&
        PUSH_UINT8(LLDP_UPOE_MDI_SUBTYPE) &&
        PUSH_UINT8(LLDP_UPOE_MDI_CAP)
    ))
        return 0;
    END_LLDP_TLV;

    // IEEE 802.3 Organizationally Specific TLV set

    // mdi power
    printf("Add MDI power\n");
    if (!(
        START_LLDP_TLV(LLDP_HPWR_MDI_TYPE) &&
        PUSH_UINT8(LLDP_HPWR_MDI_LEN) &&
        PUSH_BYTES(LLDP_HPWR_MDI_OUI, OUI_LEN) &&
        PUSH_UINT8(LLDP_HPWR_MDI_SUBTYPE) &&
        PUSH_UINT8(LLDP_HPWR_MDI_SUPPORT) &&
        PUSH_UINT8(LLDP_HPWR_MDI_PSEPAIR) &&
        PUSH_UINT8(LLDP_HPWR_MDI_CLASS) &&
        PUSH_UINT8(LLDP_HPWR_MDI_PRIO) &&
        PUSH_UINT16(LLDP_HPWR_MDI_REQUEST) &&
        PUSH_UINT16(LLDP_HPWR_MDI_GRANT)
    ))
        return 0;
    END_LLDP_TLV;

and they both are malformed apparently.

I assume the above two routines are easy to understand:

they push bytes into a buffer that makes up the LLDPPDU data.

I don't see the malformat. What am I missing?

regards peter

2 Replies 2

Chris Isaacson
Level 1
Level 1

Hi,

I have dissected the LLDPDU frame that my board receives from the switch every 30 seconds.

In particular the Power_via_MDI TLV

0xfe 0x0c 0x00 0x12 0x0f 0x02 0x00 0x01 0x05 0x00 0x00 0x82 0x00 0x82

Port Class = PSE

PSE MDI Power Support = not supported

PSE MDI Power State = disabled

PSE Pair Control Ability = not supported

PSE Power Pair = ALT-A

Power Class = Class 4

Power Type = Type2 PSE

Power Priority = Low

Power Source = Primary Power

PD requested power (0.1W units) = 130

PSE allocated power (0.1W units) = 130

My board transmits the following Power_via_MDI TLV

(this is the only type 127 TLV)

Port Class = PD

PSE MDI Power Support = supported

PSE MDI Power State = enabled

PSE Pair Control Ability = not supported

PSE Power Pair = ALT-A

Power Class = Class 4

Power Type = Type2 PD

Power Priority = Low

Power Source = PSE

PD requested power (0.1W units) = 250

PSE allocated power (0.1W units) = 130

The switch console output is

*Jul 28 00:55:32.375: LLDP tx state on GigabitEthernet1/0/3 set to INFO FRAME
*Jul 28 00:55:32.380: LLDP advertisement packet TX'd on intf GigabitEthernet1/0/
3
*Jul 28 00:55:32.380: LLDP tx state on GigabitEthernet1/0/3 set to IDLE
*Jul 28 00:55:33.439: LLDP advertisement packet RX'd on intf GigabitEthernet1/0/
3
*Jul 28 00:55:33.439: LLDP rx state on GigabitEthernet1/0/3 set to RX FRAME
*Jul 28 00:55:33.439: LLDP unknown tlv type 127 recd - ignoring it
*Jul 28 00:55:33.439: LLDP malformed optional TLV 127 found - ignored
*Jul 28 00:55:33.439: LLDP-MED orig state on GigabitEthernet1/0/3 is DOWN, rcvd
caps 0x0000
*Jul 28 00:55:33.439: LLDP rx state on GigabitEthernet1/0/3 set to WAIT FOR FRAM
E

So the type 127 TLV  is not recognized (if not recognized I do not understand

the malformed TLV because my type 127 TLV has exactly the same format

as the Power_via_MDI TLV that is transmitted by the switch).

According to the TLV from the switch, Power_via_MDI is not supported,

so how can I request more power from the POE port?

Here is my switch version

Switch#show version
Cisco IOS Software, C2960S Software (C2960S-UNIVERSALK9-M), Version 12.2(58)SE2,
RELEASE SOFTWARE (fc1)
Technical Support: http://www.cisco.com/techsupport
Copyright (c) 1986-2011 by Cisco Systems, Inc.
Compiled Thu 21-Jul-11 02:22 by prod_rel_team

ROM: Bootstrap program is Alpha board boot loader
BOOTLDR: C2960S Boot Loader (C2960S-HBOOT-M) Version 12.2(53r)SE, RELEASE SOFTWA
RE (fc3)

Switch uptime is 21 weeks, 2 days, 1 hour, 12 minutes
System returned to ROM by power-on
System image file is "flash:c2960s-universalk9-mz.122-58.SE2.bin"


This product contains cryptographic features and is subject to United
States and local country laws governing import, export, transfer and
use. Delivery of Cisco cryptographic products does not imply
third-party authority to import, export, distribute or use encryption.
Importers, exporters, distributors and users are responsible for
compliance with U.S. and local country laws. By using this product you
agree to comply with applicable laws and regulations. If you are unable
to comply with U.S. and local laws, return this product immediately.

A summary of U.S. laws governing Cisco cryptographic products may be found at:
http://www.cisco.com/wwl/export/crypto/tool/stqrg.html

If you require further assistance please contact us by sending email to
export@cisco.com.

cisco WS-C2960S-24PS-L (PowerPC) processor (revision B0) with 131072K bytes of m
emory.
Processor board ID FOC1501X1WB
Last reset from power-on
1 Virtual Ethernet interface
1 FastEthernet interface
28 Gigabit Ethernet interfaces
The password-recovery mechanism is enabled.

512K bytes of flash-simulated non-volatile configuration memory.
Base ethernet MAC Address       : 40:F4:EC:AB:87:00
Motherboard assembly number     : 73-11908-06
Power supply part number        : 341-0393-02
Motherboard serial number       : FOC145317TC
Power supply serial number      : DCA1444U7QV
Model revision number           : B0
Motherboard revision number     : A0
Model number                    : WS-C2960S-24PS-L
Daughterboard assembly number   : 73-11933-04
Daughterboard serial number     : FOC1453165N
System serial number            : FOC1501X1WB
Top Assembly Part Number        : 800-30945-02
Top Assembly Revision Number    : A0
Version ID                      : V02
CLEI Code Number                : COMGE00ARB
Daughterboard revision number   : A0
Hardware Board Revision Number  : 0x01


Switch Ports Model              SW Version            SW Image
------ ----- -----              ----------            ----------
*    1 28    WS-C2960S-24PS-L   12.2(58)SE2           C2960S-UNIVERSALK9-M


Configuration register is 0xF

Please can anybody tell me how to get this LLDP power request working?

regards peter

Hi,

The isuue is resolved.

It turned out that Type 127 TLV's inserted the TLV length as a byte

which was wrong, as the TLV length is combined with the TLV type

into a single word.

regards peter

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