07-15-2016 04:16 PM - edited 08-24-2017 05:50 AM
Introduction
What is WAN-PHY mode?
The purpose of WAN-PHY is to render 10 Gigabit Ethernet compatible with the SONET STS-192c format and data rate, as defined by ANSI, as well as the SDH VC-4-64c container specified by ITU. When the controller is in WAN-PHY mode the WIS sublayer transports 10 Gigabit Ethernet frames in an OC-192c SONET payload which can interoperate with SONET section or line level repeaters. This effectively bridges the asynchronous world of Ethernet data with synchronous SONET/SDH transport allowing 10 Gigabit Ethernet to be transparently carried over current DWDM networks without having to directly map the Ethernet frames into SONET/SDH.
PHY device maps 10GE LAN streams to STS-192c SPE and this limits the data-rate to 9.584 Gbps. WAN PHY provides rich SONET OAM capabilities for link management. It is to be noted that WAN PHY line-rate is lower than 10GE LAN rate (10.3125 Gbps).
Topology
WAN-PHY InterOP between Cisco & Juniper Topology
Cisco Configuration & show commands
Cisco Configuration:
This example shows how to configure the interface for WAN PHY mode:
RP/0/RSP0/CPU0:LSR# config
RP/0/RSP0/CPU0:LSR(config)# interface interface TenGigE0/1/0/27
RP/0/RSP0/CPU0:LSR(config-if)# transport-mode wan
RP/0/RSP0/CPU0:LSR(config-if)# commit
The following configuration is needed to operate in WAN PHY mode:
RP/0/RSP0/CPU0:LSR# config
RP/0/RSP0/CPU0:LSR(config)# controller wanphy 0/1/0/27
RP/0/RSP0/CPU0:LSR(config)# wanmode on
RP/0/RSP0/CPU0:LSR(config)# commit
Cisco show commands:
This cli displays registers, alarms, and module information for the specified 10-Gigabit Ethernet WAN PHY controller.
RP/0/RP0/CPU0:LSR2#sh controllers wanphy 0/1/0/27 all
Fri Jul 15 15:59:32.574 PDT
Interface: wanphy0/1/0/27
Configuration Mode: WAN Mode
SECTION
LOF = 1, LOS = 0, BIP(B1) = 0
LINE
AIS = 0, RDI = 1, FEBE = 0, BIP(B2) = 0
PATH
AIS = 0, RDI = 0, FEBE = 47903, BIP(B3) = 0
LOP = 0, NEWPTR = 0, PSE = 0, NSE = 0
WIS ALARMS
SEF = 1, FEPLMP = 0, FEAISP = 1
WLOS = 0, PLCD = 0
LFEBIP = 0, PBEC = 0, PLMP = 0
Active Alarms[All defects]:
Active Alarms[Highest Alarms]:
Rx(K1/K2): N/A, Tx(K1/K2): N/A
S1S0 = N/A, C2 = N/A
PATH TRACE BUFFER
Remote IP addr:
BER thresholds: SF = E-3 SD = E-6
TCA thresholds: N/A
Alarm reporting enabled for:los, lof, path lop,
REGISTERS
P_FEBE : 47903
L_FE_BIP: 0
L_BIP : 0
P_BEC : 0
S_BIP : 0
J1-Rx0 : 0x 0
J1-Rx1 : 0x 0
J1-Rx2 : 0x2f30
J1-Rx3 : 0x2f30
J1-Rx4 : 0x2d30
J1-Rx5 : 0x7865
J1-Rx6 : 0x e8
J1-Rx7 : 0x 0
Internal Information
Operational Mode: WAN Mode
Current Alarms: 0x0
This cli displays information about any alarms that are detected by the specified 10-Gigabit Ethernet WAN PHY controller.
RP/0/RP0/CPU0:LSR2#sh controllers wanphy 0/1/0/27 alarms
Fri Jul 15 15:59:38.839 PDT
Interface: wanphy0/1/0/27
Configuration Mode: WAN Mode
SECTION
LOF = 1, LOS = 0, BIP(B1) = 0
LINE
AIS = 0, RDI = 1, FEBE = 0, BIP(B2) = 0
PATH
AIS = 0, RDI = 0, FEBE = 47903, BIP(B3) = 0
LOP = 0, NEWPTR = 0, PSE = 0, NSE = 0
WIS ALARMS
SEF = 1, FEPLMP = 0, FEAISP = 1
WLOS = 0, PLCD = 0
LFEBIP = 0, PBEC = 0, PLMP = 0
Active Alarms[All defects]:
Active Alarms[Highest Alarms]:
Rx(K1/K2): N/A, Tx(K1/K2): N/A
S1S0 = N/A, C2 = N/A
PATH TRACE BUFFER
Remote IP addr:
BER thresholds: SF = E-3 SD = E-6
TCA thresholds: N/A
Alarm reporting enabled for:los, lof, path lop,
This cli displays registers for the specified 10-Gigabit Ethernet WAN PHY controller.
RP/0/RP0/CPU0:LSR2#sh controllers wanphy 0/1/0/27 registers
Fri Jul 15 15:59:44.562 PDT
Interface: wanphy0/1/0/27
Configuration Mode: WAN Mode
REGISTERS
P_FEBE : 47903
L_FE_BIP: 0
L_BIP : 0
P_BEC : 0
S_BIP : 0
J1-Rx0 : 0x 0
J1-Rx1 : 0x 0
J1-Rx2 : 0x2f30
J1-Rx3 : 0x2f30
J1-Rx4 : 0x2d30
J1-Rx5 : 0x7865
J1-Rx6 : 0x e8
J1-Rx7 : 0x 0
Internal Information
Operational Mode: WAN Mode
Current Alarms: 0x0
Cisco Configuration of Signal Failure(SF) and Signal Degrade(SD)
SD/SF BER threshold is configurable using ‘threshold’ command.
Software monitors B2 BIP errors and asserts SD/SF BER alarms whenever the error-rate exceeds the threshold. Port link will go down once BIP error-rate exceeds SF BER threshold.
RP/0/RSP0/CPU0:ios#sh controllers wanphy 0/6/0/0 alarms | inc SD
BER thresholds: SF = 10e-3 SD = 10e-6
Threshold configuration:
RP/0/RSP0/CPU0:ios#conf t
RP/0/RSP0/CPU0:ios(config)#controller wanphy 0/6/0/0
RP/0/RSP0/CPU0:ios(config-wanphy)#threshold ?
sd-ber Set Signal Degrade BER threshold
sf-ber Set Signal Fail BER threshold
CISCO Troubleshooting
Do the following steps before debugging L2/L3 layer:
1. Check Fiber or optics when B1/B2/B3 counters are incrementing
2. Check for SD_BER or SF_BER alarms in show controller wanphy <> alarms
3. Show controller tengig <> internal
RP/0/RP0/CPU0:LSR2#sh controllers tenGigE0/1/0/27 internal
Tue Jul 19 17:02:45.829 PDT
Internal data for interface: TenGigE0/1/0/27
Port Number : 27
Bay Number : 0
Ifinst : 0
Ifinst Subport : 27
Board Type : 0x00380261
Port Type : 10GE
Transport mode : WAN
BIA MAC addr : 6c9c.ed6f.214b
Oper. MAC addr : e0ac.f167.259b
Egress MAC addr : e0ac.f167.259b
Port Available : true
Status polling is : enabled
Status events are : enabled
I/F Handle : 0x06000780
Cfg Link Enabled : tx/rx enabled
H/W Tx Enable : yes
MTU : 2000
H/W Speed : 10 Gbps
H/W Duplex : Full
H/W Loopback Type : None
FEC : Disable
H/W FlowCtrl Type : None
H/W AutoNeg Enable : Off
H/W Link Defects : (0x00100000) WANPHY_SD_SF_BER
H/W Raw Link Defects : (0x00100000) WANPHY_SD_SF_BER
Link Up : yes
Link Led Status : Link up -- Green/Amber
Serdes hw version : 0.3
Serdes sw version : 8.0
Pluggable Present : yes
Pluggable Type : SFP-10G-SR
Pluggable PID : SFP-10G-SR
Pluggable Compl. : Compliant
Pluggable Type Supp.: Supported
Pluggable PID Supp. : Supported
Juniper Configuration & Show commands
Juniper Configuration:
To set a WAN-PHY on Juniper 10G interface use the following cli:
set interfaces <interface id> framing wan-phy
root@JNPR-2-LER5# show interfaces
Jul 15 15:14:11
xe-0/0/0 {
description "connected to LSR2 ten0/1/0/28 ";
framing {
wan-phy;
}
gigether-options {
802.3ad ae2;
}
}
xe-0/1/0 {
description "connected to LSR2 ten0/1/0/27 ";
framing {
wan-phy;
}
gigether-options {
802.3ad ae2;
}
}
Juniper show command:
To display interface information, use the operational mode command show interfaces xe-fpc/pic/port extensive.
root@JNPR-2-LER5# run show interfaces xe-0/0/0 extensive
Jul 15 15:19:59
Physical interface: xe-0/0/0, Enabled, Physical link is Up
Interface index: 646, SNMP ifIndex: 524, Generation: 649
Description: connected to LSR2 ten0/1/0/28
Link-level type: Ethernet, MTU: 2000, MRU: 2008, Clocking: Internal, WAN-PHY mode, Speed: OC192, BPDU Error: None, MAC-REWRITE Error: None, Loopback: None, Source filtering: Disabled, Flow control: Disabled
Pad to minimum frame size: Disabled
Device flags : Present Running
Interface flags: SNMP-Traps Internal: 0x4000
Link flags : None
CoS queues : 8 supported, 8 maximum usable queues
Hold-times : Up 0 ms, Down 0 ms
Current address: 00:19:e2:bc:17:c2, Hardware address: 00:19:e2:bc:10:00
Last flapped : 2016-07-11 18:44:03 PDT (3d 20:35 ago)
Statistics last cleared: Never
Traffic statistics:
Input bytes : 149780058791 582416 bps
Output bytes : 10938000701 0 bps
Input packets: 904262884 442 pps
Output packets: 54140655 0 pps
IPv6 transit statistics:
Input bytes : 0
Output bytes : 0
Input packets: 0
Output packets: 0
Label-switched interface (LSI) traffic statistics:
Input bytes : 0 0 bps
Input packets: 0 0 pps
Dropped traffic statistics due to STP State:
Input bytes : 0
Output bytes : 0
Input packets: 0
Output packets: 0
…..
……
……….
Cisco Supported Hardware:
List of Linecards & MPA’s with WAN-PHY support on ASR9K.
1. A9K-MPA-2x10GE
2. A9K-MPA-4x10GE
3. A9K-MPA-8x10GE
4. A9K-MPA-20x10GE
5. A9K-MPA-20x10GECM
6. A9K-MPA-2x100GE(10x10 breakout)
7. A9K-MPA-2x100GECM(10x10 breakout)
8. A9K-MPA-1x100GE(10x10 breakout)
9. A9K-24x10GE-SE/TR
10. A9K-36x10GE-SE/TR
11. A9K-8x100GE-SE/TR, A99K-8x100GE-SE/TR
12. A9K-4x100GE-SE/TR, A99K-4x100GE-SE/TR
References:
Cisco & Juniper Documentation
Related Information:
Sheetal Bhogale , Sr. Software Engineer, ASR9K
Sivakumar Munagapati, Technical Leader , ASR9K
Dinesh Pullat, Sr. Technical Leader, ASR9K
Sadananda Phadke, Sr. Technical Leader, ASR9K
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