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ACI SDK error: Validation failed: Port blocks overlap

Derek Winchester

This is not actually self-explanatory. I assume since this is a shared environment that there are conflicts in the configuration. However, the script submitted a traceback which seems to indicate that the problem is within the SDK library. If anyone ran into this, could I get some clarity on how to handle.?




$ python -vv
Baselining APIC Simulator for Learning Labs
Setting up Fabric Nodes
Configuring Fabric Policies
Traceback (most recent call last):
File "", line 11, in <module>
import startup_script
File "C:\Users\dswin\projects\aci-learning-labs-code-samples\apic_fabric_setup\", line 226, in <module>
File "c:\python27\lib\site-packages\acicobra-3.0_1k-py2.7.egg\cobra\mit\", line 63, in commit
File "c:\python27\lib\site-packages\acicobra-3.0_1k-py2.7.egg\cobra\internal\rest\", line 176, in post
return self.__parseError(rsp, CommitError, rsp.status_code)
File "c:\python27\lib\site-packages\acicobra-3.0_1k-py2.7.egg\cobra\internal\rest\", line 234, in __parseError
parseXMLError(rsp.text, errorClass, httpCode)
File "c:\python27\lib\site-packages\acicobra-3.0_1k-py2.7.egg\cobra\mit\", line 15, in parseXMLError
raise errorClass(int(errorCode), errorStr, httpCode) Validation failed: Port blocks overlap Dn0=uni/infra/accportprof-SnV_FI-1B/hports-ethernet1_9-12-typ-range,

1 Reply 1

Alex Stevenson
Cisco Employee
Cisco Employee

I think you are referring to this repo:

I tried troubleshooting, but I ran into an issue of my own so I raised an issue in that repo. I saw another issue similar to the one you've described and I made a comment with a link to this discussion.

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