Hello everyone,
I was curios of the following questions, which I have not found an answer so for on any platform/document and I believe that the original IEEE documentations are not free for the public.
Could anyone help me with the questions +/ if any mistakes were made in the descriptions of certain processes.
Thank You!
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STP
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When a RB sends a TCN BPDU and the downstream SWs receive them, do they change for all MAC records the max-age timer == forward-delay or only for those entries that are longer than forward delay.
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e.g: entry 1 has max-age currently 14seconds, entry 2 has 17. For the SW the forward delay is 15seconds (the default) are both entries are overwritten to 15s or only for entry 2 which has 17seconds left. Also if only the longer are changed isn’t this wasted cpu resource?
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If a TCN BPDU is sent to an upstream device which is not RB, does this upstream device sends the ACK back to the SW or the RB will send the ACK in response to the TCN BPDU?
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RSTP
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proposal/agreement
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link comes up/up between 2 SWs. both are placed in designated blocking states.
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Both SW sets the proposal bit to 1 in BPDU and send out BPDU onto the new link.
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The superior SW is known for both SWs at this point.
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Inferior SW places its blocked port to RP & RB sets it’s port to DP but still in blocking state at this point.
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Inferior SW places this RP to forward state & sends a copy of the proposal BPDU with the agreement bit set to 1 & proposal bit set to 0.
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RB sets the blocking port to forward state.
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if agreement is not received everything falls back to 802.1d. How?
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TC:
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SW detects TC & starts TC-While timer == 2x hello timer but only for non-edge ports & RP.
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Timer reaches 0, flushes out cached MACs on ports mentioned in step1.
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During the TC-While timer runtime every BPDU (2? if timer is 2x hello, than 2 bpdu should be sent right?) that has been sent is sent with TC bit set to 1.
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SWs that received TC == 1 BPDU, flushes MAC table entries except the one port that received the TC BPDU
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SW acts the same timer started, BPDUs are sent with TC both on DP and RPs.
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Now this causes the MACs to be flushed out but what are the next steps? how is the topology changed after that?