The ethernet switch campus core and aggregation market is primarily seeing two major trends – speed transitions to higher speeds (25/50G and 100/400G) and increase in requirements for high scale and high port density switches.
As per Dell’Oro Group, migration from 10 Gbps to 25 Gbps on the uplinks of campus switches is expected to accelerate, as 25 Gbps optics optimized for campus reach continue to come down in price. Also, 100 Gbps adoption in the campus is expected to accelerate as both 10 Gbps and 40 Gbps core switches are retired and replaced by newer 100 Gbps.
Due to emergence of cloud service providers and increased WiFi demands requirements for high scale and port density continue to rise in campus core and edge deployments.
The new Cisco® Catalyst® 9500X-60L4D, an SFP form-factor switch which has 60 non-blocking SFP56 ports supporting 10/25/50G and 4 non-blocking QSFP-DD ports supporting 100/400G will enable customers to align themselves with the industry speed transitions. Also, the innovative design of the switch allows for an impressive industry-first port density of 60 SFP ports (without breakout cables) in a 1 RU sized box that helps customers meet the increasing high port density requirements.
The Cisco Catalyst 9500 Series switches are Cisco’s lead fixed enterprise core switching platform, and part of the Catalyst 9000 family. The Cisco Catalyst 9500X-28C8D switch was introduced in early 2022 to provide a 40/100G migration path for Catalyst 6800-XL series platforms. This helped reimagine high-speed connections, reinforce security and redefine the experience for Enterprise Campus Core and Edge with the industry’s first purpose-built 400, 2001, 100, 40 Gigabit Ethernet switch with QSFP form-factor ports.
Now, we are introducing the Catalyst 9500X-60L4D, which is an SFP form-factor switch with an innovative three-row design that supports 60 non-blocking SFP56 ports supporting speeds up to 50G and 4 non-blocking QSFP-DD ports supporting speeds up to 400G. This innovative design allows for an impressive high port density of 64 ports in 1 RU sized box. The design and feature scale make this a critical addition to our expanding portfolio of products suited for Edge and Core installations.
As a member of the Catalyst 9500X family, the switch delivers core forwarding scale (MAC addresses, IP unicast & multicast routes, MPLS labels) and deep buffering for enterprise applications. The switch is based on Cisco Silicon One Q200 ASIC with up to 2 million route scale 8 GB of ultra-deep buffers which will help cater to the evolving needs of higher scale. The Q200 ASIC is unique to the Catalyst 9500X family, including the Catalyst 9500X-28C8D, and the Catalyst 9600X Supervisor Engine 2.
The Q200 ASIC can provide a total switching capacity of 12.8 Tbps and is fabricated using 7nm technology enabling very high performance at a low power footprint. This single Cisco Silicon One Q200 ASIC provides ~6 times the performance provided by the UADP 3.0 ASIC. This unlocks higher non-blocking port speeds and densities while also boasting a ~2X increase in buffers. The Virtual Output Queue (VoQ) forwarding model also eliminates Head of Line (HoL) blocking commonly seen in very high-speed circuits.
Highlights of the Catalyst 9500X-60L4D
- Intel® 2.43-GHz x86 CPU with 8 cores and QAT
- 32-GB of DDR4 memory allowing for application hosting.
- 60 non-blocking 10/25/50G Gigabit Ethernet SFP56 ports.
- 4 non-blocking 40/100/200/400 Gigabit Ethernet QSFPDD ports.
- 80MB of dedicated buffer to support low latency packet forwarding.
- 8GB of High Bandwidth Memory (HBM) providing very deep packet buffers.
- 2 10G CPU (KR) ports with up to 960GB SSD local storage for container application hosting.
- ASIC tables scale up to 256K MAC addresses and routing scale up to 2M routes.
- Customizable SDM templates to allow tweaking already high scale numbers even further.
- Hardware support for line-rate 256-bit 802.1ae MACsec and WAN-MACsec data encryption.
- Hardware capable IPSec1 data encryption, a first for Catalyst Core switches.
- Hardware support for Precision Time Protocol (PTP, IEEE 1588v2) with accurate clock synchronization and sub-microsecond accuracy.
Innovative design – Three rows of ports in a 1 RU form factor
In a first for campus switches, we now have three rows of SFP56 ports. This allows for a high port density of 60xSFP56 ports with speeds up to 50G and in the center, to allow for better heat dissipation we have 4xQSFP-DD of speeds up to up to 400G.
The switch impressively retains the 1 RU form factor, measuring 17.5’ by 20.3’ with a height of 1.73’
Reversible Airflow
The Catalyst 9500X-60L4D uses the same power supply and fan tray as the Catalyst 9500X-28C8D switch. This means that like with the C9500X-28C8D, the C9500X-60L4D also supports two different directions for airflow – Back to front (port side exhaust) or front to back (port side intake) Two different fan tray units are available for order as per varying rack requirements. The unique design allows the single power supply unit to be used for both directions with the power supply fans switching the direction of airflow depending on the direction of the fan inserted. Do note that all fan tray units must operate with the same direction for normal operation of the switch. Mixing of fan tray directions on a single switch is not permitted
Deep Buffers and VoQ Architecture – Optimized for Edge Deployments:
The new Catalyst 9500X-60L4D is built on a multi slice-based ASIC, Silicon One Q200, with a Virtual Output Queue (VoQ) forwarding architecture. This design allows Network Processing Units (NPU) to operate independently in "Slices" with cross-communication over a crossbar "Fabric".
To address the unique queuing challenges of campus edge devices, the design uses a forwarding architecture that uses a credit-based system for forwarding traffic by building Virtual queues between each ingress and egress interfaces independently. This design eliminates Head of Line (HoL) blocking which is illustrated in the figures below.
The impressive speeds and port density make the switch a natural fit to be used as a core box. However, the dual buffering capabilities and the Virtual Output Queueing on the Silicon One Q200 both the C9500X-28C8D and the C9500X-60L4D can be positioned as an edge device as well.
The switch has 80 MB dedicated buffers which enables low latency queueing for priority packets with an additional 8 GB of on-demand High Bandwidth Memory (HBM) buffers which can be accessed to queue packets in case of speed mismatches between ingress and egress or to support micro-burst sensitive flows.
The Catalyst 9500X-60L4D switch is the first fixed campus switch that supports hardware-based IPSec enabling additional use-cases for your edge core deployments. The IPSec feature is currently not enabled in the IOS-XE software, and it is a part of the IOS-XE roadmap with support coming in future.
Additionally, the C9500X-60L4D is a perfect box to invest in for future proofing your network with support for SFP56 50G speeds. The SFP56 is backwards compatible with SFP28. Invest in C9500X-60L4D today and you can use 25G speeds with dual rate optics today and upgrade to 50G as your network demands increases with no additional costs using the same optics and wiring infrastructure.
As with the release of the C9500X-28C8D, the support for the existing Catalyst 9500 high performance series switches will continue for the near future. Continue to position these boxes for core deployments with lower scale requirements. The high-performance series boxes are excellent for feature rich installations without a high scale requirement in the core and the X series boxes are perfect for customers looking for high scale core or edge boxes.
