12-28-2012 05:27 AM - edited 03-04-2019 06:31 PM
Dear all,
I noticed that my router 7200 was reboot for a bus error. The error occurred while the system was operational. After the restart the router works properly for more than 6 days.
This is the sh ver:
Cisco IOS Software, 7200 Software (C7200P-IPBASEK9-M), Version 15.0(1)M4, RELEASE SOFTWARE (fc1)
Technical Support: http://www.cisco.com/techsupport
Copyright (c) 1986-2010 by Cisco Systems, Inc.
Compiled Thu 28-Oct-10 22:57 by prod_rel_team
ROM: System Bootstrap, Version 12.4(12.2r)T, RELEASE SOFTWARE (fc1)
BOOTLDR: Cisco IOS Software, 7200 Software (C7200P-BOOT-M), Version 15.0(1)M4, RELEASE SOFTWARE (fc1)
router-main-pi uptime is 6 days, 2 hours, 23 minutes
System returned to ROM by bus error at PC 0x2E0BF30, address 0x0 at 11:47:42 UTC Sat Dec 22 2012
System image file is "disk2:c7200p-ipbasek9-mz.150-1.M4.bin"
show stacks gives the following output:
11:47:35 UTC Sat Dec 22 2012: Unexpected exception to CPU :vector 200, PC = 0x2E0BF30 , LR = 0x2E0BF04
.....
Seems that the error "System returned to ROM by bus error at PC 0x2E0BF30, address 0x0" should be a special type of bus error crash is when the crash is caused by a corrupted program counter (PC). The PC value is the location of the instruction which the processor was executing when the bus error occured. In this case, the PC has jumped to the address 0x0 (probably because of a null pointer), but this is not where the instruction is located.
Can I considere this as a processor memory parity errors and wait for a second parity error before I replace anything? What do you think about?
Thanks
Marco
12-28-2012 05:49 AM
Likely software bug, update IOS.
12-28-2012 07:55 AM
Marco - Just looking at the sh ver, we cannot consider the reset as parity error. I would suggest opening a TAC case with the crash info file and sh tech o/p.
Regards,
Rahul
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