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ASR9K RSP880-LT-TR can't access ROMMON

PK99
Level 1
Level 1

I can't access Rommon after Cntl+C. 

I keep getting the following over and over.

Any ideas?

Screenshot 2023-07-11 at 5.15.36 PM.jpg

5 Replies 5

marce1000
VIP
VIP

 

 - Looks like a hardware problem : attach a console and cold power the asr , look at the self-test sequences , 

 M.



-- ' 'Good body every evening' ' this sentence was once spotted on a logo at the entrance of a Weight Watchers Club !

Will boot up again and post output...thanks.  Unit does go into IOS tho.

PK99
Level 1
Level 1

Here is the boot up output

)!+BiMXˁPksK5
n.VrZCo5
AJBȈJBTotal bytes received from CBC, no error=0x1000

CPU reset reason = 13 (CPU_RESET_AUTO_RESET)
Total bytes received from CBC, no error=0x1000
Total bytes received from CBC, no error=0x1000
Missing Parameter SERVER_URL

##########################################################
System Bootstrap, Version 17.31 [ASR9K x86 ROMMON],
Copyright (c) 1994-2017 by Cisco Systems, Inc.
Compiled on Mon 06/11/2018 15:24:12.84

BOARD_TYPE : 0x10031a
Rommon : 17.31 (Primary)
Board Revision : 4
PCH EEPROM : 0.0
IPU FPGA(PL) : 0.12.0 (Primary)
IPU INIT(HW_FPD) : 0.18.0
IPU FSBL(BOOT.BIN) : 1.108.0
IPU LINUX(IMAGE.FPD) : 1.108.0
OPTIMUS FPGA : 0.5.0
OMEGA FPGA : 0.4.0
ALPHA FPGA : 0.5.0
CBC0 : Part 1=50.2, Part 2=50.2, Act Part=2
Product Number : A9K-RSP880-LT-TR
Chassis : ASR-9904-DC
Chassis Serial Number : FOX
Slot Number : 1
Pxe Mac Address LAN 0 : 10:b3:d5:26:36:50
Pxe Mac Address LAN 1 : 10:b3:d5:26:36:51
==========================================================
Got EMT Mode as IOS-XR Boot
Got Boot Mode as Disk Boot

Booting IOS-XR (32 bit Classic XR) - Press Ctrl-c to stop
Total bytes received from CBC, no error=0x1000
ALDRIN MICROINIT : 1.0.11

Total bytes received from CBC, no error=0x1000

MAC Init: Failed to get expected mac address
base/cur MAC is 0xFFFFFFFFFFFF/0x10B3D5263650
MAC Init: need programming MAC

MAC Init: Failed to get expected mac address

MAC Init: Failed to get expected mac address
base/cur MAC is 0xFFFFFFFFFFFF/0x10B3D5263650
MAC Init: need programming MAC2 address

MAC Init: Failed to get expected mac address

Successfully retrieve EMT mode as 3

Target OS is QNX
Press Esc for boot optionsMAC is for internal NIC interface:
MAC is not same:
MAC is for external niantic interface:
MAC is not same:
TriggerCpFpd

ASR9K FPD Starting ASR9k fpd check ...
No BIOS file found(2)
No BIOS file found(2)
Boot Option:CISCO iPXE not matching with EMT:3
No BIOS file found(14)
Boot Option:External Network 1 for IPv4 (90-E2-BA-38-29-81) not matching with EMT:3
No BIOS file found(2)
Boot Option:Internal Network 0 for IPv4 (90-E2-BA-48-39-71) VLAN(3073) not matching with EMT:3
No BIOS file found(2)
Boot Option:SanDisk not matching with EMT:3
Boot Option:External Network 1 for IPv4 (90-E2-BA-38-29-81) not matching with EMT:3
Boot Option:SMART eUSB HS-SD/MMC not matching with EMT:3
Boot Option:Internal Network 0 for IPv4 (90-E2-BA-48-39-71) VLAN(3073) not matching with EMT:3
Boot Option:Micron_5100_MTFDDAV240TCB not matching with EMT:3
Boot Option:SanDisk not matching with EMT:3
Boot Option:Micron_5100_MTFDDAV240TCB not matching with EMT:3
Boot Option:SMART eUSB HS-SD/MMC not matching with EMT:3
OS_EMT_MODE_XRBOOT Internal EFI shell
Internal EFI ShellUEFI Interactive Shell v2.1 not matching with EMT:3
EDK II
UEFI v2.40 (INSYDE Corp., 0x55150025)B not matching with EMT:3
***********************************************************************************
********************* Welcome to ASR9k Rommon Application *************************
***********************************************************************************
Baseline Rommon Tag : Tag-17
Shell : EFI 2.0
Build Info : Built on 03/30/2017 at 14:00 hours
Comments :
V21.1 features
1. first drop
V21.3 features
1. B0 stepping CPU support
V21.4 features
1. TFTP file transfer
2. 8M BIOS region upgrade
3. IPU and other FPGAs upgrade
V21.5 features
1. Mod Phy recipe 22 for PCIe instabilty fix
V21.6 features
1. Mod Phy recipe 22 for SATA discovery fix
2. Latest PXE binary to fix PXE boot timeout
V21.7 features
1. pcie bar address set to 64bit for skybolt
2. Set RP4, RP5 to gen1 speed, skybolt supports gen1 only
3. Disable ASPM capability for RP
4. Skip LED setting and map command
V21.8 features
1. Secure Boot Support
V21.9 features
1. Send MBOX to IPU for Aldrin profile
2. Intel LEK28 migration
3. Set Azteca default baudrate to 115200
4. Reset LC after 5 times PXE boot fail
5. Set default setting in IPU NVRAM
V21.10 features
1. OS image validation
2. MB only support
3. PXE boot, eeupdate fix
V21.11 features
1. PLX all lightspeed port enable, pcie fix
V21.12 features
1. BIOS only upgarde support
2. BIOS display version fix
3. skybolt gen3 support
4. Send state OPERATIONAL to CBC
V21.14 features
1. DNV LPC mode, turn on debug output capability
2. Enable SPI Flash to upgrade BIOS region
3. BIOS send Boot success GPIO status and change x86-ctrl block ID
4. Recovery mechanism required if critical devices are not detected at Azetca LC BIOS
5. SlotImplemented bit clear for Aldrin discovery on reset fix
6. Print cookie checksum error, but allow to process the cookie
7. Disable USB SMI in PXE boot
8. Set RP0 bifurcation to x4x4 to match PLX x4
V21.15 features
1. Set back RP0 bifurcation to 0x8
2. Use RP preseent bit to determine the RP active status, when neither active
3. Put back reset -h for LS
V21.16 features
1. Set RP0 bifurcation to 0x4
V21.17 features
1. cookie read/write failure, error recovery support
V21.18 features
1. BIOS hang at post code 0xA2, fix
2. OS secure boot, GRUB validation
3. Full BIOS upgarde from ROMMON CLI
***********************************************************************************
Enter efi_start
Enter vx86rmon_efi_start
Entering vx86rmon_init
Total bytes received from CBC, no error=0x1000

CPU reset reason = 13 (CPU_RESET_AUTO_RESET)
Total bytes received from CBC, no error=0x1000
Emt Mode is 3, os_type is 2

##########################################################
System Bootstrap, Version 17.31 [ASR9K x86 ROMMON],
Copyright (c) 1994-2017 by Cisco Systems, Inc.
Compiled on Mon 06/11/2018 15:24:12.84

BOARD_TYPE : 0x10031a
Rommon : 17.31 (Primary)
Board Revision : 4
PCH EEPROM : 0.0
IPU FPGA(PL) : 0.12.0 (Primary)
IPU INIT(HW_FPD) : 0.18.0
IPU FSBL(BOOT.BIN) : 1.108.0
IPU LINUX(IMAGE.FPD) : 1.108.0
OPTIMUS FPGA : 0.5.0
OMEGA FPGA : 0.4.0
ALPHA FPGA : 0.5.0
CBC0 : Part 1=50.2, Part 2=50.2, Act Part=2
==========================================================
DRAM Frequency: 2133 MHz
DRAM Frequency: 2133 MHz
Memory Size: 16384 MB
Valid Flash Device returned -
Device Type 3
Id 1620512, ExtId 0, Size 8, VendorName Micron DeviceName N25Q128A
Memory Size: 16384 MB
MAC Address from cookie: 10:b3:d5:26:36:50
Board Type: 0x0010031a
Chassis Type: 0x00ef02f6
Slot Number: 01
Total bytes received from CBC, no error=0x1000
Chassis Serial: FOX
Cbc uart base address = 3e8
The value of autoc is 0xc09d4285
Autoneg did not complete.

The value of autoc is 0xc09d4285
Autoneg did not complete.

[NIANTIC] PCIE LINK UP
[Niantic] INTEL EOBC LINK UP
aldrin_init .... Done
In cbc_get_rommon_fast_bootstatus 1377741312
mbi_boot_smart_reload() - Fastboot status is zero
Disable aldrin tftp port 25
Enable aldrin EOBC port 9
Sending Boot Image validation request.
HIT CTRL-C to abort
Candidate Boot Image num 0 is disk0:asr9k-os-mbi-6.4.2.CSCvz49512-1.0.0/0x100305/mbiasr9k-rsp3.vm
Interface link changed state to UP.
Interface link state up.
................Boot Image validation: Boot response retry
Trying local boot path 0: disk0:asr9k-os-mbi-6.4.2.CSCvz49512-1.0.0/0x100305/mbiasr9k-rsp3.vm ...
Beginning Media boot:
**** check image validation ****
.......BIOS CODE SIGN ENTRY ...

Image ASR9K verified successfully
boot_disk2 - Launching image.


#################################################################
Program load complete, Entry point: 0x1000dc08, size: 0x212bd9c
Exiting bios boot services..
Clearing Run/Stop bit and Bios Own bit
Startup-code initializing, running on Sapphire (0010031a)
BSP date: Jun 13 2017 11:47:46
Debugging enabled; debug_flag = 1, vendor_debug_flag = 0
Page Address Extension mode (PAE) enabled with 36bit physical addressing.
Found 16384MB of main memory
Reading back MTRR config from boot processor.
Found LP at APIC ID 2
Found LP at APIC ID 4
Found LP at APIC ID 6
IPL reports 4 logical processors
Family = 00000006, Model = 00000056
4 CPU cores available
Initializing logical processor 0 (APIC ID 0).......OK (BSP)
Initializing logical processor 1 (APIC ID 2).......OK
Initializing logical processor 2 (APIC ID 4).......OK
Initializing logical processor 3 (APIC ID 6).......OK
Chassis Type: ASR9904 (00ef02f6)
Region shmwin1: 70000000:b0000000
Region pakman: b0000000:b8000000
##################################################################################################################################################################################################

System page at phys:00023000 user:fed23000 kern:fed26000
Starting next program at vfe043040
Kernel Dumper Boot Init
*** Welcome to QNX neutrino!
*** ASR9K RSP.
tracelogger: starting tracing in background ring mode
tracelogger running with args: -startring -F 1 -F 2
Use private TLB mappings
Restricted Rights Legend

Use, duplication, or disclosure by the Government is
subject to restrictions as set forth in subparagraph
(c) of the Commercial Computer Software - Restricted
Rights clause at FAR sec. 52.227-19 and subparagraph
(c) (1) (ii) of the Rights in Technical Data and Computer
Software clause at DFARS sec. 252.227-7013.

cisco Systems, Inc.
170 West Tasman Drive
San Jose, California 95134-1706

 

Cisco IOS XR Software for the Cisco XR ASR9K, Version 6.4.2
Copyright (c) 2021 by Cisco Systems, Inc.

This (D)RP Node is not ready or active for login /configuration
Media storage device /harddisk: was repaired. Check fsck log at /harddisk:/chkfs_repair.log

- Contact TAC and provide the output ,

M.


-- ' 'Good body every evening' ' this sentence was once spotted on a logo at the entrance of a Weight Watchers Club !

I figured it out...Cntrl+C takes place much later after boot.

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