In the router FPGA is used for sending BFD , so its in the forwarding plane from my understanding so it does not get sent to cpu which will increase and put more pressure on cpu , its light weight on the forwarding plane less intensive
From Docs ---some parts of BFD can be distributed to the data plane, it can be less CPU-intensive than the reduced EIGRP, IS-IS, and OSPF timers, which exist wholly at the control plane.