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instead of this stack how make the redunency in core using two number of 3560G
Minimally, you run a link from each edge L2 switch to each L3 switch. If you have the same VLAN across multiple edge switches, you'll have L2 loops, for which you'll need STP to logically keep from forming. (As a rule you normally want STP enabled.) You'll also want to set root bridge to be primary on one L3 switch and secondary on the other L3 switch.
Then you run HSRP on the (3560G) L3 switches.
Normally you also run a link between the two L3 switches. This link might be just L3 or it might be L2 (L2 cross connect provides another L2 redundant path - often done to insure L2 between the two L3s.) With the L2 cross connect (often a trunk), you'll need to consider L2 traffic flows between the HSRP GW and return traffic. Also normally you treat one L3 as the hot for all traffic and the secondary as a warm standby, but you can also, but using HSRP priorities and STP root priorities, load balance VLANs across the two L3 cores. (Some platforms also support GLBP, but the 3560s do not.)
When working with two L3 switches, it's possible to run into unicast flooding. This can be avoided by design and/or mitigate by insuring the ARP and MAC table timers are the same.
