03-19-2024 04:25 AM
Hi all
I know that upgrade a relase in ISSU mode on WS-C6807-XL-6T device is not advisable.
Anyway, My question is: if the upgrade is done inside the same release train could we have problem ?
for example:
from 15.5(1)SY8 to 15.5.1-SY12
or
from 15.5(1)SY1 to 15.5.1-SY12
The release 15.5.1-SY12 is the last suggested
Unfortunately, I haven't found appropriate documentation for 15.5(x)SY release, but only for major release train (16.x or 17.x or 18.x)
follow the link :
Is there anyone who had experience in this case ?
thanks in advance
Fabrizio
Solved! Go to Solution.
03-19-2024 04:36 AM - edited 03-19-2024 04:37 AM
@marzi wrote:
from 15.5(1)SY1 to 15.5.1-SY12
Starting from 15.5(1)SY4, Sup6T and associated line cards require a mandatory and very manual FPGA upgrade. This information is not easily picked up by reading the 15.5(1)SY release notes because it is a "footnote" in the Secure FPGA Support section of the Release Notes.
ISSU, FSU/eFSU/xFSU does not support FPGA upgrade.
However, if somebody still insist on IOS upgrade with ISSU, make sure to raise a proactive TAC Case because if-and-when the ISSU upgrade inevitably fails TAC should know how to action to take back control of the chassis.
03-19-2024 04:36 AM - edited 03-19-2024 04:37 AM
@marzi wrote:
from 15.5(1)SY1 to 15.5.1-SY12
Starting from 15.5(1)SY4, Sup6T and associated line cards require a mandatory and very manual FPGA upgrade. This information is not easily picked up by reading the 15.5(1)SY release notes because it is a "footnote" in the Secure FPGA Support section of the Release Notes.
ISSU, FSU/eFSU/xFSU does not support FPGA upgrade.
However, if somebody still insist on IOS upgrade with ISSU, make sure to raise a proactive TAC Case because if-and-when the ISSU upgrade inevitably fails TAC should know how to action to take back control of the chassis.
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