Here is the result of the sh controller t1
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No Title
T1 0/0/0 is up.
Applique type is Channelized T1
Cablelength is long 0db
No alarms detected.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Version info Firmware: 20090408, FPGA: 13, spm_count = 0
Framing is ESF, Line Code is B8ZS, Clock Source is Line.
CRC Threshold is 320. Reported from firmware is 320.
Data in current interval (643 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
67 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
67 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
Total Data (last 80 15 minute intervals):
0 Line Code Violations, 0 Path Code Violations,
7426 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
7425 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 19 Unavail Secs
T1 0/1/0 is up.
Applique type is Channelized T1
Cablelength is long 0db
No alarms detected.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Version info Firmware: 20090408, FPGA: 13, spm_count = 0
Framing is ESF, Line Code is B8ZS, Clock Source is Line.
CRC Threshold is 320. Reported from firmware is 320.
Data in current interval (650 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
68 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
68 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
Total Data (last 80 15 minute intervals):
0 Line Code Violations, 0 Path Code Violations,
7428 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
7427 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 17 Unavail Secs
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What part of my config do you want to see? (it's HUGE hate to post the whole thing)
