12-19-2008 08:49 AM - edited 03-04-2019 12:46 AM
Does anyone have a document that shows the ASIC mappings on these two switches. I am looking for something that will show port 1-5 in on the first asic and 6-10 and the second etc. Ideas?
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12-19-2008 02:06 PM
ASIC stands for Application-Specific Integrated Circuit. On a switch, there are many ASICs - you can have an ASIC dedicated for NetFlow, ACLs, among other services.
The more ASICs you have in a switch, the less you use the CPU for those services hence making the switch a lot faster.
In the 6500/4500, the ports are group due to the oversubscription nature and they are physically connected to an ASIC. This hardware controls traffic to/from the port or group of ports.
HTH,
__
Edison.
12-19-2008 12:32 PM
Hello Daniel,
I didn't find ASICs mappings only the declared performance data for C3750
see table 2
Hope to help
Giuseppe
12-19-2008 01:30 PM
The port-grouping is done in modular switches such as 4500 and 6500 due to the limited backplane capability.
3560/3750 perform wire rate switching and do not implement any kind of port-grouping.
HTH,
__
Edison.
12-19-2008 01:56 PM
so when you say wire rate. If I have a 48 port 3750 E all running gig (48 gig) and I have 4 trunk ports running 10 gig (40 gig) is that still wire rate? where does the remaining 8 gig come from? I am trying to understand what wire rate really means.
12-19-2008 01:58 PM
Can someone tell me what an asic is as it relates to the switch ports on a switch?
12-19-2008 02:06 PM
ASIC stands for Application-Specific Integrated Circuit. On a switch, there are many ASICs - you can have an ASIC dedicated for NetFlow, ACLs, among other services.
The more ASICs you have in a switch, the less you use the CPU for those services hence making the switch a lot faster.
In the 6500/4500, the ports are group due to the oversubscription nature and they are physically connected to an ASIC. This hardware controls traffic to/from the port or group of ports.
HTH,
__
Edison.
12-19-2008 02:03 PM
Yes, all that information is contained in the data sheet provided in the post above mine.
Wire rate means speed that equals to the speed of the port, there isn't any oversubscription like in the 6500 and 4500 switches.
12-19-2008 07:25 PM
I haven't seen that documented.
For the later 3750-E, there's: http://www.cisco.com/en/US/prod/collateral/switches/ps5718/ps5023/prod_presentation09186a0080161372.pdf. I would think the non-E architecture might be somewhat similar.
Since original StackWise ports are 8 Gbps and the 10 gig port on the 3750G-16TD only could sustain 8 Gbps, and the fabric is noted as 32 Gbps, I think there's a chance port ASICs in the 3560/3750 support 8 Gbps.
12-23-2008 11:38 AM
Addendum:
Just came across the "sh platform pm if-numbers", which in column "port" might note the ASIC port as the first value.
02-07-2013 05:08 AM
Guys,
Dont know if this is of any use but the commend on a 3560 - sh platform pm platform-block gives the following
A04S05-3560-20#sh platform pm platform-block
interface gid gpn lpn asic hw-i flags sp dp bundle vlan mvid mac so_di i_vlan
-----------------------------------------------------------------------------
Fa0/1 3 3 1 1 2 U 2 2 no 0 0 0 61443 0
Fa0/2 4 4 2 1 3 U 1 2 no 0 0 0 61444 0
Fa0/3 5 5 3 1 4 U 2 2 no 0 0 0 61445 0
Fa0/4 6 6 4 1 5 D 2 2 no 0 0 0 61446 0
Fa0/5 7 7 5 1 6 D 2 2 no 0 0 0 61447 0
Fa0/6 8 8 6 1 7 U 1 1 no 0 0 0 61448 0
Fa0/7 9 9 7 1 8 U 2 2 no 0 0 0 61449 0
Fa0/8 10 10 8 1 9 U 2 2 no 0 0 0 61450 0
Fa0/9 11 11 9 1 10 U 2 2 no 0 0 0 61451 0
Fa0/10 12 12 10 1 11 U 2 2 no 0 0 0 61452 0
Fa0/11 13 13 11 1 12 U 2 2 no 0 0 0 61453 0
Fa0/12 14 14 12 1 13 U 2 2 no 0 0 0 61454 0
Fa0/13 15 15 13 1 14 U 2 2 no 0 0 0 61455 0
Fa0/14 16 16 14 1 15 U 2 2 no 0 0 0 61456 0
Fa0/15 17 17 15 1 16 U 2 2 no 0 0 0 61457 0
Fa0/16 18 18 16 1 17 U 2 2 no 0 0 0 61458 0
Fa0/17 19 19 17 1 18 U 2 2 no 0 0 0 61459 0
Fa0/18 20 20 18 1 19 U 2 2 no 0 0 0 61460 0
Fa0/19 21 21 19 1 20 U 2 2 no 0 0 0 61461 0
Fa0/20 22 22 20 1 21 U 2 2 no 0 0 0 61462 0
Fa0/21 23 23 21 1 22 D 1 2 no 0 0 0 61463 0
Fa0/22 24 24 22 1 23 U 1 1 no 0 0 0 61464 0
Fa0/23 25 25 23 1 24 U 2 2 no 0 0 0 61465 0
Fa0/24 26 26 24 1 25 U 2 2 no 0 0 0 61466 0
Fa0/25 29 29 25 0 2 U 2 2 no 0 0 0 61469 0
Fa0/26 30 30 26 0 3 U 2 2 no 0 0 0 61470 0
Fa0/27 31 31 27 0 4 U 2 2 no 0 0 0 61471 0
Fa0/28 32 32 28 0 5 U 1 2 no 0 0 0 61472 0
Fa0/29 33 33 29 0 6 U 2 2 no 0 0 0 61473 0
Fa0/30 34 34 30 0 7 U 2 2 no 0 0 0 61474 0
Fa0/31 35 35 31 0 8 U 2 2 no 0 0 0 61475 0
Fa0/32 36 36 32 0 9 U 2 2 no 0 0 0 61476 0
Fa0/33 37 37 33 0 10 D 0 0 no 0 0 0 61477 0
Fa0/34 38 38 34 0 11 U 2 2 no 0 0 0 61478 0
Fa0/35 39 39 35 0 12 D 0 0 no 0 0 0 61479 0
Fa0/36 40 40 36 0 13 U 2 2 no 0 0 0 61480 0
Fa0/37 41 41 37 0 14 D 1 2 no 0 0 0 61481 0
Fa0/38 42 42 38 0 15 U 2 2 no 0 0 0 61482 0
Fa0/39 43 43 39 0 16 D 1 2 no 0 0 0 61483 0
Fa0/40 44 44 40 0 17 U 2 2 no 0 0 0 61484 0
Fa0/41 45 45 41 0 18 U 2 2 no 0 0 0 61485 0
Fa0/42 46 46 42 0 19 U 2 2 no 0 0 0 61486 0
Fa0/43 47 47 43 0 20 U 2 2 no 0 0 0 61487 0
Fa0/44 48 48 44 0 21 D 0 0 no 0 0 0 61488 0
Fa0/45 49 49 45 0 22 U 2 2 no 0 0 0 61489 0
Fa0/46 50 50 46 0 23 D 0 0 no 0 0 0 61490 0
Fa0/47 51 51 47 0 24 U 2 2 no 0 0 0 61491 0
Fa0/48 52 52 48 0 25 U 2 2 no 0 0 0 61492 0
Gi0/1 1 56 49 1 0 U 3 2 no 0 0 0 61496 0
Gi0/2 2 57 50 1 1 U 3 2 no 0 0 0 61497 0
Gi0/3 27 27 51 0 1 D 0 0 no 0 0 0 61467 0
Gi0/4 28 28 52 0 0 D 0 0 no 0 0 0 61468 0
Po1 56 56 0 0 0 U 0 0 no 0 0 0 61496 0
A04S05-3560-20#
which appears to show two asics, each controlling 26 ports (24 Fa and 2 Gi) (Po may be even distributed between asics)
hope it helps.
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