Solved: Illegal HDLC error

alister9000 · ‎05-29-2012

hi everyone,

so i just got a t1 line and when i configure the IP address i get this error message

Illegal HDLC serial type code 972, PC=0x213FEF40

before this error comes, i am able to ping for about 5 seconds, after the error the port shuts down.

now, i found out that this is because the router received a piece of information and it doesnt know what to do with it, and it has to do with encapsulation.

im a little green about cisco routers, so i was wondering if someone can help me figure out how to fix this. I talk with the isp and they told me that there's nothing they can do to help. they provided me with an adtran t1 device so i can connect it to the ethernet port but i dont have any ethernet port left on the router so i need to use the t1 port.

is there anyway i can configure the router to ignore that error? because im assuming that if im beeing able to ping for a couple seconds until that error it means that outside that error everything is fine.

i dont know if it matters but i have a cisco 1921 router..

thanks,

John Blakley · ‎05-29-2012

You'll need to contact the ISP to get the appropriate settings. They have FR configured on their router and that should translate to the Cisco with no issues. The fact that the interface comes up and stays up is proof enough that FR encapsulation is used. The only thing you haven't done is change the encapsulation type:

int s0/0/0.500

encapsulat frame-relay ietf

HTH, John *** Please rate all useful posts ***

View solution in original post

paolo bevilacqua · ‎05-29-2012

The T1 circuit is likely faulty.

Since the 1921 has two ethernet ports, have them bring in the interface converter, so whaever circuit problem will be ISP and telco responsibility to solve.

After the circuit will be working you will be able to connect the router T1 directly if you want.

alister9000 · ‎05-29-2012

Paolo Bevilacqua wrote:

The T1 circuit is likely faulty.

Since the 1921 has two ethernet ports, have them bring in the interface converter, so whaever circuit problem will be ISP and telco responsibility to solve.

After the circuit will be working you will be able to connect the router T1 directly if you want.

thank you for the reply,

i connected a computer directly into the adtran that they provided and configured the LAN ip address that they gave me and it worked fine. so i dont think its a faulty circuit.

i didnt know there was such a thing as an interface converter, how does that work? is it to connect the ethernet into the t1 port?

John Blakley · ‎05-29-2012

David,

If you're connecting a patch cable from the CSU/DSU (Adtran) into the WIC that is also a CSU/DSU, you'll probably see this error. Can you post "sh inventory"?

HTH,

John

HTH, John *** Please rate all useful posts ***

alister9000 · ‎05-29-2012

j.blakley wrote:

David,

If you're connecting a patch cable from the CSU/DSU (Adtran) into the WIC that is also a CSU/DSU, you'll probably see this error. Can you post "sh inventory"?

HTH,

John

thank you for the reply John,

i am connecting the cable comming from the MPOE to the T1 CSU/DSU port.

and i just received an email from the ISP saying that the protocol is down and that i should contact support about it, (which i already did and told me that they cant help).

here is the sh inventory output

Router#sh inventory

NAME: "CISCO1921/K9 chassis", DESCR: "CISCO1921/K9 chassis"

PID: CISCO1921/K9 , VID: V04 , SN: FGL161322ZC

NAME: "WAN Interface Card - HWIC CSU/DSU on Slot 0 SubSlot 0", DESCR: "WAN Interface Card - HWIC CSU/DSU"

PID: HWIC-1DSU-T1 , VID: V02 , SN: FOC16093PUB

John Blakley · ‎05-29-2012

David,

I'm assuming that you are connecting the cable directly from the smartjack to the WIC on the router and bypassing the Adtran? Can you post your serial configuration? (Mask out addresses) Also, post "sh controllers".

John

HTH, John *** Please rate all useful posts ***

alister9000 · ‎05-29-2012

j.blakley wrote:

David,

I'm assuming that you are connecting the cable directly from the smartjack to the WIC on the router and bypassing the Adtran? Can you post your serial configuration? (Mask out addresses) Also, post "sh controllers".

John

Yes that is how im connecting it.

I changed the ip address on this output.

!

interface Serial0/0/0

ip address 1.1.1.1 255.255.255.252

!

also i was able to telnet into the adtran and got this i dont know if it will be of any help, i dont quite understand it ..

interface fr 1.500 point-to-point

frame-relay interface-dlci 500

ip address 1.1.1.1 255.255.255.252

no lldp send-and-receive

here is the sh controllers output:

Router#sh controllers

Embedded engine is not enabled

Interface GigabitEthernet0/0

= Hardware =

Hardware is PLATFORM SGMII INTERFACE

HWIDB: 309A3978, INSTANCE: 309A4680, FASTSEND: 2114A740, MCI_INDEX: 0

Route Cache Flag: 11

= Media RJ45 =

Media Change Count: 1

PORT IPD Registers:

BP_PAGE_CNT: 0x0000000000000001, BP_CNTS_PRX: 0x0000000000000000

GMX Registers:

RXX_INT_REG: 0x0000000000000000, RXX_INT_EN : 0x0000000000000000

PRTX_CFG : 0x000000000000300F, RXX_FRM_CTL: 0x0000000000000077

RXX_FRM_CHK: 0x00000000000003BA, RXX_FRM_MIN: 0x0000000000000000

RXX_FRM_MAX: 0x0000000000000000, RXX_JABBER : 0x0000000000002580

RXX_DECISIO: 0x0000000000000018, RXX_FRM_CTL: 0x0000000000000077

RXX_FRM_CHK: 0x00000000000003BA, RXX_JABBER : 0x0000000000002580

RXX_DECISIO: 0x0000000000000018, RXX_UDD_SKI: 0x0000000000000000

RXX_STATS_C: 0x0000000000000000, RXX_IFG : 0x0000000000000008

RXX_PAU_DRP: 0x0000000000000000, RXX_STATS_P: 0x0000000000CB57E8

RXX_STAT_CT: 0x0000000000000000, RXX_STATS_D: 0x0000000000013333

RXX_STAT_DR: 0x0000000000000000, RXX_STATS_B: 0x0000000000000000

SMACX : 0x0000442B03A288C0

TXX_SGMII_C: 0x0000000000000001, TXX_CTL : 0x0000000000000003

RX_PRTS : 0x0000000000000004, RX_BP_DROP : 0x0000000000000002

RX_BP_ON : 0x0000000000000040, RX_BP_OFF : 0x0000000000000010

TXX_PAU_PKT: 0x0000000000000060, TXX_MIN_PKT: 0x000000000000003B

TXX_PAU_PKI: 0x0000000000000010, TXX_SOFTPAU: 0x0000000000000000

TXX_PAU_TGO: 0x0000000000000000, TXX_PAU_ZRO: 0x0000000000000001

INF_MODE : 0x0000000000000032, TX_PRTS : 0x0000000000000004

TX_IFG : 0x0000000000000048, TX_JAM : 0x00000000000000EE

TX_COL_ATMP: 0x0000000000000010, TX_PAU_DMAC: 0x00000180C2000001

TX_PAU_TYPE: 0x0000000000008808, TX_OVR_BP : 0x0000000000000101

TX_BP : 0x0000000000000000, TX_CORRUPT : 0x000000000000000F

RX_PRT_INFO: 0x0000000000000000, GMX_STAT_BP: 0x0000000000000000

TX_INT_REG : 0x0000000000000000, TX_INT_EN : 0x0000000000000000

ADR_CAM0 : 0x0000000000000044

ADR_CAM1 : 0x000000000000002B

ADR_CAM2 : 0x0000000000000003

ADR_CAM3 : 0x00000000000000A2

ADR_CAM4 : 0x0000000000000088

ADR_CAM5 : 0x00000000000000C0

ADR_CTL : 0x000000000000000D, CAM_EN : 0x00000000000000FF

TXX_STAT0 : 0x0000000000000000, TXX_STAT1 : 0x0000000000000000

TXX_STAT2 : 0x000000012DC097EF, TXX_STAT3 : 0x0000000000CBEA37

TXX_STAT4 : 0x00214FBB00000000, TXX_STAT5 : 0x00107C0700694D44

TXX_STAT6 : 0x0006301000040868, TXX_STAT7 : 0x00000000002698B9

TXX_STAT8 : 0x000038380000020D, TXX_STAT9 : 0x0000000000000000

PCS Registers:

MRX_CTL_REG: 0x0000000000001140, MRX_STS_REG: 0x000000000000017C

RXX_STA_REG: 0x0000000000001CC7, RXX_SYN_REG: 0x0000000000000003

TXX_STA_REG: 0x0000000000000064, SGMX_AN_ADV: 0x0000000000001801

SGMX_AN_ADV: 0x000000000000D801, MISC_CTL : 0x0000000000000000

ANX_ADV_REG: 0x0000000000000060, ANX_LP_ABIL: 0x000000000000D000

ANX_RESULTS: 0x0000000000000017, ANX_EXT_ST : 0x000000000000C000

LNX_TMR_CNT: 0x00000000000002FD, TX_RXX_PLRT: 0x0000000000000000

INT_REG : 0x0000000000000000, INT_EN_REG : 0x0000000000000000

LOG_ANL_REG: 0x0000000000000000, ANX_ADV_REG: 0x0000000000000060

ANX_LP_ABIL: 0x000000000000D000, ANX_RSL_REG: 0x0000000000000017

ANX_EXT_ST : 0x000000000000C000, LNX_TMR_CNT: 0x00000000000002FD

MISCX_CTL: 0x0000000000001001

==============PIP Statistics================

PIP_RX_NO_ERR = 0, PIP_PARTIAL_ERR = 0

PIP_JABBER_ERR = 0, PIP_OVER_FCS_ERR = 0

PIP_OVER_ERR = 0, PIP_ALIGN_ERR = 0

PIP_UNDER_FCS_ERR = 0, PIP_GMX_FCS_ERR = 0

PIP_UNDER_ERR = 0, PIP_EXTEND_ERR = 0

PIP_PIP_L2_MAL_HDR = 0

pip_rx_no_particle = 0, pip_undef_err = 0

pip_rx_no_buf_start = 0

PHY REGISTERS:

Display for CRC check for page:6

PACKET_GENERATION reg_addr: 16: 0x0010

CRC COUNTERS reg_addr: 17: 0xFF00

page number:0

Copper Contrl @ reg_addr: 0: 0x1140

Copper Status @ reg_addr: 1: 0x796D

PHY Idf1 @ reg_addr: 2: 0x0141

PHY Idf2 @ reg_addr: 3: 0x0C97

Autoneg Adv @ reg_addr: 4: 0x0DE1

Autoneg Lnk Ptr abty @ reg_addr: 5: 0xC1E1

Autoneg Exp @ reg_addr: 6: 0x000D

Autoneg Nx Pg Tx @ reg_addr: 7: 0x2801

Autoneg Lk Prt Nx Pg @ reg_addr: 8: 0x4944

1000B-T Ctr @ reg_addr: 9: 0x0E00

1000B-T St @ reg_addr: 10: 0x3800

Copper Ext St @ reg_addr: 15: 0x3000

Copper Specific Ctl1 @ reg_addr: 16: 0x6060

Copper Specific St1 @ reg_addr: 17: 0xAC08

Copper Interrupt En @ reg_addr: 18: 0x0000

Copper Specific St2 @ reg_addr: 19: 0x0000

Copper Rcv Er Ctr @ reg_addr: 21: 0x0000

Copper Specific Ctl2 @ reg_addr: 26: 0x8040

page number:1

Fiber Contrl @ reg_addr: 0: 0x1140

Fiber Status @ reg_addr: 1: 0x794D

PHY Idf1 @ reg_addr: 2: 0x0141

PHY Idf2 @ reg_addr: 3: 0x0C97

Autoneg Adv @ reg_addr: 4: 0x0060

Autoneg Lnk Ptr abty @ reg_addr: 5: 0x0000

Autoneg Exp @ reg_addr: 6: 0x0004

Autoneg Nx Pg Tx @ reg_addr: 7: 0x2001

Autoneg Lk Prt Nx Pg @ reg_addr: 8: 0x0000

Fiber Ext St @ reg_addr: 15: 0x3000

Fiber Specific Ctl1 @ reg_addr: 16: 0x0000

Fiber Specific St1 @ reg_addr: 17: 0x0018

Fiber Interrupt En @ reg_addr: 18: 0x0000

Fiber Specific St2 @ reg_addr: 19: 0x0000

Fiber Rcv Er Ctr @ reg_addr: 21: 0x0000

Fiber Specific Ctl2 @ reg_addr: 26: 0x8085

page number:2

MAC Contrl @ reg_addr: 0: 0x1040

PHY Idf1 @ reg_addr: 2: 0x0141

PHY Idf2 @ reg_addr: 3: 0x0C97

MAC Specific Ctl1 @ reg_addr: 16: 0x0288

MAC Specific St1 @ reg_addr: 17: 0x0440

MAC Interrupt En @ reg_addr: 18: 0x0000

MAC Specific St2 @ reg_addr: 19: 0x0000

MAC Specific Ctl2 @ reg_addr: 26: 0x0005

TX_COUNT: 0, TX_LIMITED: 0, TX_HEAD: 245, TX_TAIL: 245

TX_MIN_SIZE: 32, TX_MAX_SIZE: 512, TX_CURRENT_SIZE: 128

RX STARVES: 0

Software MAC Address Filter (hash:length/addr/mask/hits)

--------------------------------------------------------

0x000: 0 ffff.ffff.ffff 0000.0000.0000 190280

0x0C0: 0 0100.0ccc.cccc 0000.0000.0000 38479

0x0C0: 1 0180.c200.0002 0000.0000.0000 0

0x0C3: 0 442b.03a2.88c0 0000.0000.0000 0

0x0C5: 0 0180.c200.0007 0000.0000.0000 0

Software filtered frames: 472239

Unicast overflow mode: 0

Multicast overflow mode: 1

Promiscuous mode: 0

Total Number of CAM entries: 1

Port Stopped: N

Internal Loopback Set: N

Interface GigabitEthernet0/1

= Hardware =

Hardware is PLATFORM SGMII INTERFACE

HWIDB: 309B3020, INSTANCE: 309B3D80, FASTSEND: 2114A740, MCI_INDEX: 0

Route Cache Flag: 11

= Media RJ45 =

Media Change Count: 1

PORT IPD Registers:

BP_PAGE_CNT: 0x0000000000020001, BP_CNTS_PRX: 0x0000000000000000

GMX Registers:

RXX_INT_REG: 0x0000000000000000, RXX_INT_EN : 0x0000000000000000

PRTX_CFG : 0x0000000000003005, RXX_FRM_CTL: 0x000000000000007F

RXX_FRM_CHK: 0x00000000000003BA, RXX_FRM_MIN: 0x0000000000000000

RXX_FRM_MAX: 0x0000000000000000, RXX_JABBER : 0x0000000000002580

RXX_DECISIO: 0x0000000000000018, RXX_FRM_CTL: 0x000000000000007F

RXX_FRM_CHK: 0x00000000000003BA, RXX_JABBER : 0x0000000000002580

RXX_DECISIO: 0x0000000000000018, RXX_UDD_SKI: 0x0000000000000000

RXX_STATS_C: 0x0000000000000000, RXX_IFG : 0x0000000000000008

RXX_PAU_DRP: 0x0000000000000000, RXX_STATS_P: 0x0000000000CDA5D0

RXX_STAT_CT: 0x0000000000000000, RXX_STATS_D: 0x0000000000000000

RXX_STAT_DR: 0x0000000000000000, RXX_STATS_B: 0x0000000000000000

SMACX : 0x0000442B03A288C1

TXX_SGMII_C: 0x0000000000000001, TXX_CTL : 0x0000000000000003

RX_PRTS : 0x0000000000000004, RX_BP_DROP : 0x0000000000000002

RX_BP_ON : 0x0000000000000040, RX_BP_OFF : 0x0000000000000010

TXX_PAU_PKT: 0x0000000000000060, TXX_MIN_PKT: 0x000000000000003B

TXX_PAU_PKI: 0x0000000000000010, TXX_SOFTPAU: 0x0000000000000000

TXX_PAU_TGO: 0x0000000000000000, TXX_PAU_ZRO: 0x0000000000000001

INF_MODE : 0x0000000000000032, TX_PRTS : 0x0000000000000004

TX_IFG : 0x0000000000000048, TX_JAM : 0x00000000000000EE

TX_COL_ATMP: 0x0000000000000010, TX_PAU_DMAC: 0x00000180C2000001

TX_PAU_TYPE: 0x0000000000008808, TX_OVR_BP : 0x0000000000000101

TX_BP : 0x0000000000000000, TX_CORRUPT : 0x000000000000000F

RX_PRT_INFO: 0x0000000000000000, GMX_STAT_BP: 0x0000000000000000

TX_INT_REG : 0x0000000000000000, TX_INT_EN : 0x0000000000000000

ADR_CAM0 : 0x0000000000000044

ADR_CAM1 : 0x000000000000002B

ADR_CAM2 : 0x0000000000000003

ADR_CAM3 : 0x00000000000000A2

ADR_CAM4 : 0x0000000000000088

ADR_CAM5 : 0x00000000000000C1

ADR_CTL : 0x000000000000000D, CAM_EN : 0x00000000000000FF

TXX_STAT0 : 0x0000000000000000, TXX_STAT1 : 0x0000000000000000

TXX_STAT2 : 0x00000000711C1E80, TXX_STAT3 : 0x0000000000C4D762

TXX_STAT4 : 0x00253B6400000000, TXX_STAT5 : 0x0010AE870081FCE5

TXX_STAT6 : 0x0006FCC200025501, TXX_STAT7 : 0x0000000000039ECF

TXX_STAT8 : 0x00003D08000017EA, TXX_STAT9 : 0x0000000000000000

PCS Registers:

MRX_CTL_REG: 0x0000000000001140, MRX_STS_REG: 0x000000000000017C

RXX_STA_REG: 0x0000000000001CC7, RXX_SYN_REG: 0x0000000000000003

TXX_STA_REG: 0x0000000000000064, SGMX_AN_ADV: 0x0000000000001801

SGMX_AN_ADV: 0x000000000000D401, MISC_CTL : 0x0000000000000000

ANX_ADV_REG: 0x0000000000000060, ANX_LP_ABIL: 0x000000000000D000

ANX_RESULTS: 0x000000000000000F, ANX_EXT_ST : 0x000000000000C000

LNX_TMR_CNT: 0x00000000000002FD, TX_RXX_PLRT: 0x0000000000000000

INT_REG : 0x0000000000000000, INT_EN_REG : 0x0000000000000000

LOG_ANL_REG: 0x0000000000000000, ANX_ADV_REG: 0x0000000000000060

ANX_LP_ABIL: 0x000000000000D000, ANX_RSL_REG: 0x000000000000000F

ANX_EXT_ST : 0x000000000000C000, LNX_TMR_CNT: 0x00000000000002FD

MISCX_CTL: 0x0000000000001005

==============PIP Statistics================

PIP_RX_NO_ERR = 0, PIP_PARTIAL_ERR = 0

PIP_JABBER_ERR = 0, PIP_OVER_FCS_ERR = 0

PIP_OVER_ERR = 0, PIP_ALIGN_ERR = 0

PIP_UNDER_FCS_ERR = 0, PIP_GMX_FCS_ERR = 0

PIP_UNDER_ERR = 0, PIP_EXTEND_ERR = 0

PIP_LENGTH_ERR = 0, PIP_DAT_ERR = 0

PIP_SKIP_ERR = 0, PIP_NIBBLE_ERR = 0

PIP_UNKNOWN_ERR_14 = 0, PIP_UNKNOWN_ERR_15 = 0

PIP_PIP_FCS = 0, PIP_PIP_SKIP_ERR = 0

PIP_PIP_L2_MAL_HDR = 0

pip_rx_no_particle = 0, pip_undef_err = 0

pip_rx_no_buf_start = 0

PHY REGISTERS:

Display for CRC check for page:6

PACKET_GENERATION reg_addr: 16: 0x0010

CRC COUNTERS reg_addr: 17: 0xFF00

page number:0

Copper Contrl @ reg_addr: 0: 0x1140

Copper Status @ reg_addr: 1: 0x796D

PHY Idf1 @ reg_addr: 2: 0x0141

PHY Idf2 @ reg_addr: 3: 0x0C97

Autoneg Adv @ reg_addr: 4: 0x0DE1

Autoneg Lnk Ptr abty @ reg_addr: 5: 0x45E1

Autoneg Exp @ reg_addr: 6: 0x0005

Autoneg Nx Pg Tx @ reg_addr: 7: 0x2001

Autoneg Lk Prt Nx Pg @ reg_addr: 8: 0x0000

1000B-T Ctr @ reg_addr: 9: 0x0E00

1000B-T St @ reg_addr: 10: 0x4000

Copper Ext St @ reg_addr: 15: 0x3000

Copper Specific Ctl1 @ reg_addr: 16: 0x6060

Copper Specific St1 @ reg_addr: 17: 0x6F48

Copper Interrupt En @ reg_addr: 18: 0x0000

Copper Specific St2 @ reg_addr: 19: 0x0000

Copper Rcv Er Ctr @ reg_addr: 21: 0x0000

Copper Specific Ctl2 @ reg_addr: 26: 0x8040

page number:1

Fiber Contrl @ reg_addr: 0: 0x1140

Fiber Status @ reg_addr: 1: 0x794D

PHY Idf1 @ reg_addr: 2: 0x0141

PHY Idf2 @ reg_addr: 3: 0x0C97

Autoneg Adv @ reg_addr: 4: 0x0060

Autoneg Lnk Ptr abty @ reg_addr: 5: 0x0000

Autoneg Exp @ reg_addr: 6: 0x0004

Autoneg Nx Pg Tx @ reg_addr: 7: 0x2001

Autoneg Lk Prt Nx Pg @ reg_addr: 8: 0x0000

Fiber Ext St @ reg_addr: 15: 0x3000

Fiber Specific Ctl1 @ reg_addr: 16: 0x0000

Fiber Specific St1 @ reg_addr: 17: 0x0018

Fiber Interrupt En @ reg_addr: 18: 0x0000

Fiber Specific St2 @ reg_addr: 19: 0x0000

Fiber Rcv Er Ctr @ reg_addr: 21: 0x0000

Fiber Specific Ctl2 @ reg_addr: 26: 0x8085

page number:2

MAC Contrl @ reg_addr: 0: 0x1040

PHY Idf1 @ reg_addr: 2: 0x0141

PHY Idf2 @ reg_addr: 3: 0x0C97

MAC Specific Ctl1 @ reg_addr: 16: 0x0288

MAC Specific St1 @ reg_addr: 17: 0x0440

MAC Interrupt En @ reg_addr: 18: 0x0000

MAC Specific St2 @ reg_addr: 19: 0x0000

MAC Specific Ctl2 @ reg_addr: 26: 0x0005

TX_COUNT: 0, TX_LIMITED: 0, TX_HEAD: 324, TX_TAIL: 324

TX_MIN_SIZE: 32, TX_MAX_SIZE: 512, TX_CURRENT_SIZE: 128

RX STARVES: 0

Software MAC Address Filter (hash:length/addr/mask/hits)

--------------------------------------------------------

0x000: 0 ffff.ffff.ffff 0000.0000.0000 0

0x0C0: 0 0100.0ccc.cccc 0000.0000.0000 0

0x0C0: 1 0180.c200.0002 0000.0000.0000 0

0x0C2: 0 442b.03a2.88c1 0000.0000.0000 0

0x0C5: 0 0180.c200.0007 0000.0000.0000 0

Software filtered frames: 0

Unicast overflow mode: 0

Multicast overflow mode: 1

Promiscuous mode: 0

Total Number of CAM entries: 1

Port Stopped: N

Internal Loopback Set: N

Interface Serial0/0/0

Hardware is SCC with Integrated FT1 CSU/DSU module

Clock Freq detected Rx clk/Tx clk 1472561/1472561 (+-10%)

idb at 0x309E69BC, driver data structure at 0x284E2DE0

wic_info 0x309ED8D8

WIC Serial Global Registers: (0x10490000)

----------------------------

sti_errintr_en (0004): 0x00000000 scc_ctrl_regs (1004): 0x0020

mgmt_intr_status (1010): 0x0010 netio_intr_status (1012): 0x0000

mgmt_intr_enable (1020): 0x00CA netio_intr_enable (1022): 0x0001

timer_0_7_enable (1024): 0x0000 timer_16_19_enable (1026): 0x0000

timer_0_1_program (1030): 0x0000 timer_2_3_program (1032): 0x0000

timer_4_5_program (1034): 0x0000 timer_6_7_program (1036): 0x0000

timer_16_program (1040): 0x0000 timer_17_program (1042): 0x0000

timer_18_program (1044): 0x0000 timer_19_program (1046): 0x0000

WIC Serial SCC Registers: (0)

----------------------------

ch_mode_cfg (1100): 0x08019031 ch_flag_cfg (1104): 0x007E

ch_flwctrl_cfg (1108): 0x0000 ch_intr_enable (110C): 0x09FF

ch_cmd_stat (110E): 0x0050

WIC Serial DMA Registers:

-------------------------

Rx ring_start_ptr (2000): 0x0EA9B080 Rx ring_mask_index (2004): 0x00F80000

internal_desc_stat (2008): 0x0400060C internal_buff_addr (200C): 0x0EAA9740

internal_context (2010): 0x00000013 internal_fifo_data (2014): 0x0EAA9740

Tx ring_start_ptr (2200): 0x0EA9D080 Tx ring_mask_index (2204): 0x03F80018

internal_desc_stat (2208): 0x00000000 internal_buff_addr (220C): 0x0DDA4E6C

internal_context (2210): 0x00000301 internal_fifo_data (2214): 0xDB60442B

WIC Serial Interface Registers:

-------------------------------

intf_ctrl (3000): 0x1000 modem_ctrl (3002): 0x0118

flow_ctrl (3004): 0xB070 brg dvdr (3006): 0x0000

WIC TDM/FREQ Counter Registers:

--------------------------------

tdm_control (3100): 0x0000 tdm_a_8k_divider (3102): 0x0000

tdm_b_8k_divider (3104): 0x0000

freq_count_port_sel (310A): 8 freq_count (310C): 1030793

TDM Control Registers:

----------------------

tmdsw_ctl (addr 0x104B0040): 0x28070A4A

vmcr[0] (addr 0x104B0060): 0x28070892

vmcr[1] (addr 0x104B0064): 0x280708DA

vmcr[2] (addr 0x104B0068): 0x28070922

vmcr[3] (addr 0x104B006C): 0x2807096A

ntr_cr0 (addr 0x104B0078): 0x280709B2

ntr_cr1 (addr 0x104B0080): 0x280709FA

tpllr_cr (addr 0x104B0088): 0x25110000

sm_tdm_cr (addr 0x104B0070): 0x2807088A

pvdm_tdm_cr (addr 0x104B0074): 0x280708D2

968 input aborts on receiving flag sequence

0 throttles, 0 enables

30 overruns

0 transmitter underruns

322 transmitter CTS losts

919 rxintr, 982 txintr, 0 rxerr, 0 txerr

0 tx_abort 0 tx_reset

tx_limited = 1(2) tx_count = 0

idb at 0x309E69BC, driver data structure at 0x284E2DE0

Receive Ring

rxr head (0)(0x0EA9B080), rxr tail (0)(0x0EA9B080)

rmd(EA9B080): stats_len 8400060C buff_addr EAA9740

rmd(EA9B088): stats_len 8400060C buff_addr EAB5CE0

rmd(EA9B090): stats_len 8400060C buff_addr EAAA400

rmd(EA9B098): stats_len 8400060C buff_addr EAB6340

rmd(EA9B0A0): stats_len 8400060C buff_addr EAAAA60

rmd(EA9B0A8): stats_len 8400060C buff_addr EAAB0C0

rmd(EA9B0B0): stats_len 8400060C buff_addr EAAB720

rmd(EA9B0B8): stats_len 8400060C buff_addr EAABD80

rmd(EA9B0C0): stats_len 8400060C buff_addr EAAC3E0

rmd(EA9B0C8): stats_len 8400060C buff_addr EAACA40

rmd(EA9B0D0): stats_len 8400060C buff_addr EAAD0A0

rmd(EA9B0D8): stats_len 8400060C buff_addr EAAD700

rmd(EA9B0E0): stats_len 8400060C buff_addr EAADD60

rmd(EA9B0E8): stats_len 8400060C buff_addr EAAE3C0

rmd(EA9B0F0): stats_len 8400060C buff_addr EAAEA20

rmd(EA9B0F8): stats_len 8400060C buff_addr EAAF080

rmd(EA9B100): stats_len 8400060C buff_addr EAAF6E0

rmd(EA9B108): stats_len 8400060C buff_addr EAAFD40

rmd(EA9B110): stats_len 8400060C buff_addr EAB03A0

rmd(EA9B118): stats_len 8400060C buff_addr EAB0A00

rmd(EA9B120): stats_len 8400060C buff_addr EAB1060

rmd(EA9B128): stats_len 8400060C buff_addr EAB16C0

rmd(EA9B130): stats_len 8400060C buff_addr EAB1D20

rmd(EA9B138): stats_len 8400060C buff_addr EAB2380

rmd(EA9B140): stats_len 8400060C buff_addr EAB29E0

rmd(EA9B148): stats_len 8400060C buff_addr EAB3040

rmd(EA9B150): stats_len 8400060C buff_addr EAB36A0

rmd(EA9B158): stats_len 8400060C buff_addr EAB3D00

rmd(EA9B160): stats_len 8400060C buff_addr EAB4360

rmd(EA9B168): stats_len 8400060C buff_addr EAB49C0

rmd(EA9B170): stats_len 8400060C buff_addr EAB5020

rmd(EA9B178): stats_len 8400060C buff_addr EAB5680

Transmit Ring

txr head (1)(0x0EA9D088), txr tail (1)(0x0EA9D088)

tmd(EA9D080): sts_len 01C00000 buf_addr DDA5BD4

tmd(EA9D088): sts_len 00000000 buf_addr 0

tmd(EA9D090): sts_len 00000000 buf_addr 0

tmd(EA9D098): sts_len 00000000 buf_addr 0

tmd(EA9D0A0): sts_len 00000000 buf_addr 0

tmd(EA9D0A8): sts_len 00000000 buf_addr 0

tmd(EA9D0B0): sts_len 00000000 buf_addr 0

tmd(EA9D0B8): sts_len 00000000 buf_addr 0

tmd(EA9D0C0): sts_len 00000000 buf_addr 0

tmd(EA9D0C8): sts_len 00000000 buf_addr 0

tmd(EA9D0D0): sts_len 00000000 buf_addr 0

tmd(EA9D0D8): sts_len 00000000 buf_addr 0

tmd(EA9D0E0): sts_len 00000000 buf_addr 0

tmd(EA9D0E8): sts_len 00000000 buf_addr 0

tmd(EA9D0F0): sts_len 00000000 buf_addr 0

tmd(EA9D0F8): sts_len 00000000 buf_addr 0

tmd(EA9D100): sts_len 00000000 buf_addr 0

tmd(EA9D108): sts_len 00000000 buf_addr 0

tmd(EA9D110): sts_len 00000000 buf_addr 0

tmd(EA9D118): sts_len 00000000 buf_addr 0

tmd(EA9D120): sts_len 00000000 buf_addr 0

tmd(EA9D128): sts_len 00000000 buf_addr 0

tmd(EA9D130): sts_len 00000000 buf_addr 0

tmd(EA9D138): sts_len 00000000 buf_addr 0

tmd(EA9D140): sts_len 00000000 buf_addr 0

tmd(EA9D148): sts_len 00000000 buf_addr 0

tmd(EA9D150): sts_len 00000000 buf_addr 0

tmd(EA9D158): sts_len 00000000 buf_addr 0

tmd(EA9D160): sts_len 00000000 buf_addr 0

tmd(EA9D168): sts_len 00000000 buf_addr 0

tmd(EA9D170): sts_len 00000000 buf_addr 0

tmd(EA9D178): sts_len 00000000 buf_addr 0

tmd(EA9D180): sts_len 00000000 buf_addr 0

tmd(EA9D188): sts_len 00000000 buf_addr 0

tmd(EA9D190): sts_len 00000000 buf_addr 0

tmd(EA9D198): sts_len 00000000 buf_addr 0

tmd(EA9D1A0): sts_len 00000000 buf_addr 0

tmd(EA9D1A8): sts_len 00000000 buf_addr 0

tmd(EA9D1B0): sts_len 00000000 buf_addr 0

tmd(EA9D1B8): sts_len 00000000 buf_addr 0

tmd(EA9D1C0): sts_len 00000000 buf_addr 0

tmd(EA9D1C8): sts_len 00000000 buf_addr 0

tmd(EA9D1D0): sts_len 00000000 buf_addr 0

tmd(EA9D1D8): sts_len 00000000 buf_addr 0

tmd(EA9D1E0): sts_len 00000000 buf_addr 0

tmd(EA9D1E8): sts_len 00000000 buf_addr 0

tmd(EA9D1F0): sts_len 00000000 buf_addr 0

tmd(EA9D1F8): sts_len 00000000 buf_addr 0

tmd(EA9D200): sts_len 00000000 buf_addr 0

tmd(EA9D208): sts_len 00000000 buf_addr 0

tmd(EA9D210): sts_len 00000000 buf_addr 0

tmd(EA9D218): sts_len 00000000 buf_addr 0

tmd(EA9D220): sts_len 00000000 buf_addr 0

tmd(EA9D228): sts_len 00000000 buf_addr 0

tmd(EA9D230): sts_len 00000000 buf_addr 0

tmd(EA9D238): sts_len 00000000 buf_addr 0

tmd(EA9D240): sts_len 00000000 buf_addr 0

tmd(EA9D248): sts_len 00000000 buf_addr 0

tmd(EA9D250): sts_len 00000000 buf_addr 0

tmd(EA9D258): sts_len 00000000 buf_addr 0

tmd(EA9D260): sts_len 00000000 buf_addr 0

tmd(EA9D268): sts_len 00000000 buf_addr 0

tmd(EA9D270): sts_len 00000000 buf_addr 0

tmd(EA9D278): sts_len 00000000 buf_addr 0

tmd(EA9D280): sts_len 00000000 buf_addr 0

tmd(EA9D288): sts_len 00000000 buf_addr 0

tmd(EA9D290): sts_len 00000000 buf_addr 0

tmd(EA9D298): sts_len 00000000 buf_addr 0

tmd(EA9D2A0): sts_len 00000000 buf_addr 0

tmd(EA9D2A8): sts_len 00000000 buf_addr 0

tmd(EA9D2B0): sts_len 00000000 buf_addr 0

tmd(EA9D2B8): sts_len 00000000 buf_addr 0

tmd(EA9D2C0): sts_len 00000000 buf_addr 0

tmd(EA9D2C8): sts_len 00000000 buf_addr 0

tmd(EA9D2D0): sts_len 00000000 buf_addr 0

tmd(EA9D2D8): sts_len 00000000 buf_addr 0

tmd(EA9D2E0): sts_len 00000000 buf_addr 0

tmd(EA9D2E8): sts_len 00000000 buf_addr 0

tmd(EA9D2F0): sts_len 00000000 buf_addr 0

tmd(EA9D2F8): sts_len 00000000 buf_addr 0

tmd(EA9D300): sts_len 00000000 buf_addr 0

tmd(EA9D308): sts_len 00000000 buf_addr 0

tmd(EA9D310): sts_len 00000000 buf_addr 0

tmd(EA9D318): sts_len 00000000 buf_addr 0

tmd(EA9D320): sts_len 00000000 buf_addr 0

tmd(EA9D328): sts_len 00000000 buf_addr 0

tmd(EA9D330): sts_len 00000000 buf_addr 0

tmd(EA9D338): sts_len 00000000 buf_addr 0

tmd(EA9D340): sts_len 00000000 buf_addr 0

tmd(EA9D348): sts_len 00000000 buf_addr 0

tmd(EA9D350): sts_len 00000000 buf_addr 0

tmd(EA9D358): sts_len 00000000 buf_addr 0

tmd(EA9D360): sts_len 00000000 buf_addr 0

tmd(EA9D368): sts_len 00000000 buf_addr 0

tmd(EA9D370): sts_len 00000000 buf_addr 0

tmd(EA9D378): sts_len 00000000 buf_addr 0

tmd(EA9D380): sts_len 00000000 buf_addr 0

tmd(EA9D388): sts_len 00000000 buf_addr 0

tmd(EA9D390): sts_len 00000000 buf_addr 0

tmd(EA9D398): sts_len 00000000 buf_addr 0

tmd(EA9D3A0): sts_len 00000000 buf_addr 0

tmd(EA9D3A8): sts_len 00000000 buf_addr 0

tmd(EA9D3B0): sts_len 00000000 buf_addr 0

tmd(EA9D3B8): sts_len 00000000 buf_addr 0

tmd(EA9D3C0): sts_len 00000000 buf_addr 0

tmd(EA9D3C8): sts_len 00000000 buf_addr 0

tmd(EA9D3D0): sts_len 00000000 buf_addr 0

tmd(EA9D3D8): sts_len 00000000 buf_addr 0

tmd(EA9D3E0): sts_len 00000000 buf_addr 0

tmd(EA9D3E8): sts_len 00000000 buf_addr 0

tmd(EA9D3F0): sts_len 00000000 buf_addr 0

tmd(EA9D3F8): sts_len 00000000 buf_addr 0

tmd(EA9D400): sts_len 00000000 buf_addr 0

tmd(EA9D408): sts_len 00000000 buf_addr 0

tmd(EA9D410): sts_len 00000000 buf_addr 0

tmd(EA9D418): sts_len 00000000 buf_addr 0

tmd(EA9D420): sts_len 00000000 buf_addr 0

tmd(EA9D428): sts_len 00000000 buf_addr 0

tmd(EA9D430): sts_len 00000000 buf_addr 0

tmd(EA9D438): sts_len 00000000 buf_addr 0

tmd(EA9D440): sts_len 00000000 buf_addr 0

tmd(EA9D448): sts_len 00000000 buf_addr 0

tmd(EA9D450): sts_len 00000000 buf_addr 0

tmd(EA9D458): sts_len 00000000 buf_addr 0

tmd(EA9D460): sts_len 00000000 buf_addr 0

tmd(EA9D468): sts_len 00000000 buf_addr 0

tmd(EA9D470): sts_len 00000000 buf_addr 0

tmd(EA9D478): sts_len 00000000 buf_addr 0

buffer size 1524

John Blakley · ‎05-29-2012

David,

Did they tell you that they had you configured for frame relay? If you connect their router to the smartjack, does the circuit work? If so, you can try to change your configuration like so:

interface Serial0/0/0

encaps frame-relay

inter s0/0/0.500 point-to-point

ip address 1.1.1.1 255.255.255.252

frame-relay interface-dlci 500

See if that helps your issue...

HTH,

John

HTH, John *** Please rate all useful posts ***

alister9000 · ‎05-29-2012

j.blakley wrote:

David,

Did they tell you that they had you configured for frame relay? If you connect their router to the smartjack, does the circuit work? If so, you can try to change your configuration like so:

interface Serial0/0/0

encaps frame-relay

inter s0/0/0.500 point-to-point

ip address 1.1.1.1 255.255.255.252

frame-relay interface-dlci 500

See if that helps your issue...

HTH,

John

They did not mention anything, when i ask for help they just give me the ip configuration that i already have.

i tried the configuration you gave me and it did not work.

thanks for the reply.

John Blakley · ‎05-29-2012

David,

If that didn't work, the next step is to get in touch with the provider as Paolo suggested. I find it suspicious that they have their provider router configured for FR and they're telling you to configure for hdlc. The initial configuration that you have would work if they're providing the correct information. The provider will have to provide you the correct encapsulation in order for you to keep a link up. Also, when you call you may want to ask them why their router that they've given you is configured for frame relay....FR encapsulation and HDLC encapsulation are 2 different things and will not work between the two.

968 input aborts on receiving flag sequence

0 throttles, 0 enables

30 overruns

0 transmitter underruns

322 transmitter CTS losts

919 rxintr, 982 txintr, 0 rxerr, 0 txerr

0 tx_abort 0 tx_reset

HTH,

John

HTH, John *** Please rate all useful posts ***

alister9000 · ‎05-29-2012

j.blakley wrote:

David,

If that didn't work, the next step is to get in touch with the provider as Paolo suggested. I find it suspicious that they have their provider router configured for FR and they're telling you to configure for hdlc. The initial configuration that you have would work if they're providing the correct information. The provider will have to provide you the correct encapsulation in order for you to keep a link up. Also, when you call you may want to ask them why their router that they've given you is configured for frame relay....FR encapsulation and HDLC encapsulation are 2 different things and will not work between the two.

968 input aborts on receiving flag sequence

0 throttles, 0 enables

30 overruns

0 transmitter underruns

322 transmitter CTS losts

919 rxintr, 982 txintr, 0 rxerr, 0 txerr

0 tx_abort 0 tx_reset

HTH,

John

I will try that again, thanks for your help.

alister9000 · ‎05-29-2012

John,

i apologize i did not notice this before. on the adtran device i found this.

interface t1 1/1

tdm-group 1 timeslots 1-24 speed 64

no shutdown

!

interface fr 1 point-to-point

frame-relay lmi-type ansi

max-reserved-bandwidth 100

no shutdown

cross-connect 1 t1 1/1 1 frame-relay 1

!

interface fr 1.500 point-to-point

frame-relay interface-dlci 500

ip address 1.1.1.1 255.255.255.252

no lldp send-and-receive

i dont know it it will be of any help.

thanks.

John Blakley · ‎05-29-2012

Can you post your running-config from the router?

Does the circuit work if you are using just the provider's router?

HTH, John *** Please rate all useful posts ***

alister9000 · ‎05-29-2012

j.blakley wrote:

Can you post your running-config from the router?

Does the circuit work if you are using just the provider's router?

yes, it works if i use the ethernet port.

i erased some specifics on the following. (i hope i didnt miss anything)

we have a dsl line connected to the router, that will be the default gateway but the t1 will only be used by a set of devices.

!

boot-start-marker

boot-end-marker

!

logging buffered 51200 warnings

enable secret 5 $1$YAn7$PLC3uW2H4lQ7p/n8mxrZk1

enable password

!

no aaa new-model

!

no ipv6 cef

ip source-route

ip cef

!

ip dhcp excluded-address 192.168.1.2 192.168.1.50

!

ip dhcp pool pool1

network 192.168.1.0 255.255.255.0

default-router 192.168.1.1

dns-server

domain-name b

!

ip domain name b

!

multilink bundle-name authenticated

!

crypto pki token default removal timeout 0

!

crypto pki trustpoint TP-self-signed-1892

enrollment selfsigned

subject-name cn=IOS-Self-Signed-Certificate-1892

revocation-check none

rsakeypair TP-self-signed-1892

!

crypto pki certificate chain TP-self-signed-1892

certificate self-signed 01

30820229 30820192 A0030201 02020101 300D0609 2A864886 F70D0101 05050030

quit

license udi pid

!

username .

!

redundancy

!

interface Embedded-Service-Engine0/0

no ip address

shutdown

!

interface GigabitEthernet0/0

description inside network

ip address 192.168.1.1 255.255.255.0

ip nat inside

ip virtual-reassembly in

duplex auto

speed auto

no mop enabled

!

interface GigabitEthernet0/1

description Outside

ip address 2.2.2.2 255.255.255.0

ip nat outside

ip virtual-reassembly in

duplex auto

speed auto

!

interface Serial0/0/0

description T1

no ip address

encapsulation frame-relay

!

interface Serial0/0/0.500 point-to-point

ip address 1.1.1.1 255.255.255.252

frame-relay interface-dlci 500

!

ip default-gateway 2.2.2.2

ip forward-protocol nd

!

ip http server

ip http access-class 23

ip http authentication local

ip http secure-server

ip http timeout-policy idle 60 life 86400 requests 10000

!

ip nat inside source list 101 interface GigabitEthernet0/1 overload

ip nat inside source static tcp 192.168.1.20 80 interface GigabitEthernet0/1 80

ip route 0.0.0.0 0.0.0.0 GigabitEthernet0/1

ip route 192.168.2.0 255.255.255.0 192.168.1.2

!

access-list 101 permit ip 192.168.1.0 0.0.0.255 any

access-list 101 permit ip 192.168.2.0 0.0.0.255 any

!

control-plane

!

banner exec ^C

% Password expiration warning.

-----------------------------------------------------------------------

Cisco Configuration Professional (Cisco CP) is installed on this device

and it provides the default username "cisco" for one-time use. If you have

already used the username "cisco" to login to the router and your IOS image

supports the "one-time" user option, then this username has already expired.

You will not be able to login to the router with this username after you exit

this session.

It is strongly suggested that you create a new username with a privilege level

of 15 using the following command.

username privilege 15 secret 0

Replace and with the username and password you want to

use.

-----------------------------------------------------------------------

^C

banner login ^C

-----------------------------------------------------------------------

Cisco Configuration Professional (Cisco CP) is installed on this device.

This feature requires the one-time use of the username "cisco" with the

password "cisco". These default credentials have a privilege level of 15.

YOU MUST USE CISCO CP or the CISCO IOS CLI TO CHANGE THESE PUBLICLY-KNOWN

CREDENTIALS

Here are the Cisco IOS commands.

username privilege 15 secret 0

no username cisco

Replace and with the username and password you want

to use.

IF YOU DO NOT CHANGE THE PUBLICLY-KNOWN CREDENTIALS, YOU WILL NOT BE ABLE

TO LOG INTO THE DEVICE AGAIN AFTER YOU HAVE LOGGED OFF.

For more information about Cisco CP please follow the instructions in the

QUICK START GUIDE for your router or go to http://www.cisco.com/go/ciscocp

-----------------------------------------------------------------------

^C

!

line con 0

password

login

line aux 0

line 2

no activation-character

no exec

transport preferred none

transport input all

transport output pad telnet rlogin lapb-ta mop udptn v120 ssh

stopbits 1

line vty 0 4

access-class 23 in

privilege level 15

password

login

transport input telnet ssh

line vty 5 15

access-class 23 in

privilege level 15

password

login local

transport input telnet ssh

!

scheduler allocate 20000 1000

end

John Blakley · ‎05-29-2012

If it works while connected to the ethernet port, the circuit is configured for FR. It's best that you contact them for the settings that you need. If you have the interface up while configured for FR (as you are now), does the interface go up/up?

HTH, John *** Please rate all useful posts ***