The Catalyst 9200L switches has a non-blocking architecture?
I have found at documentations that Catalyst 9200 uses UADP 2.0 mini ASIC which has up 100G total bandwidth.
In another guide, the information is that "Non-mGig models are powered by a single UADP 2.0 mini ASIC, whereas the mGig" models have two UADP 2.0 mini ASICs".
Once, the switch C9200L-48P-4X has 256 Gbps switching capacity with stacking, and not is a non-mGig model, how to it is possible this provide this value of 256 Gbps, with only one UADP 2.0 mini ASIC?
So, the Catalyst 9200L, the SKU model C9200L-48P-4X, has a non-blocking architecture?
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