Cisco Catalyst 9500-48Y4C switch: interplay between ASIC and CPU

jshayne · ‎11-11-2022

Hi,

As I understand, Cisco Catalyst 9500-48Y4C switch uses both ASIC and CPU. Particularly, ASIC chip is used for basic switching. Meanwhile, CPU can be used for app-hosting feature (Docker containers). I am wondering whether we can have the interplay between ASIC and CPU so that the containers (processed by CPU) can leverage ASIC performance.

marce1000 · ‎11-11-2022

- You may find this document informational : https://www.ciscolive.com/c/dam/r/ciscolive/us/docs/2019/pdf/BRKARC-2035.pdf

M.

-- Each morning when I wake up and look into the mirror I always say ' Why am I so brilliant ? '
When the mirror will then always repond to me with ' The only thing that exceeds your brilliance is your beauty! '

jshayne · ‎11-12-2022

Hi Marce,

Thank you for the comprehensive document. Unfortunately, I could not find the configuration for the interplay between ASIC and CPU in the document.