08-29-2011 12:09 PM - edited 03-07-2019 01:57 AM
Hi,
I am desperately looking for some good documents to understand all these things like hardware forwarding,CPU punting,s/w forwarding etc on cisco switches...Even after working a lot on IOS,i am not able to understand clearly what these things exactly means..Can somebody please point me to some good doucments to understand all these..Please post the links to multiple documents if you know many...Thanks a lot.
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08-29-2011 02:45 PM
Hi Ankur,
this is the link of a project to design a L2/L3 switch with a mixed HW/SW architecture and it provides a very good explanation of how transit between the 2 level works. What it is best is a decent list of references:
http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.79.8262&rep=rep1&type=pdf
A good primer on Layer2 switches architecture based on Programmable Logic Devices
The best one on Cisco switches is this from Cisco Press
http://www.ciscopress.com/articles/article.asp?p=102093&seqNum=2
I am myself weak on switching and I believe there is a lot to it especially about doing it on routing platforms like the new ISR G2 with IRB enabled. If you have some about that please share.
Hope this helps some.
Fabio
08-29-2011 03:57 PM
Ankur
It's often spread through a lot of different docs and your question is very general so perhaps some more specifics would help.
In general switches both L2 and L3 have dedicated ASICs (Application Specific Integrated Circuits) which allow them to forward packets in hardware. These ASICs are very good at doing specific tasks but they are not general purpose processors such as the main CPU.
So a switch looks to forward as many as packets as possible using the ASICs. If we use a 6500 as an example - the supervisor on a 6500 contains an MSFC card and a PFC card.
The MSFC is responsible for the control plane protocols at L2 and L3 these being STP/CDP/VTP/PagP etc. at L2 and the routing protocol at L3. So it establishes and exchanges routes with any L3 peers. All these functions are handled by the main CPU and therefore are handled in software. The MSFC can also forward packets but you want to avoid this if at all possible. If packets are forwarded by the MSFC then we refer to these as being software switched.
The PFC is responsible for forwarding the actual data and it does this using ASICs. Note that the linecards in a 6500 also have dedicated ASICs for the port connections and connections to the switch fabric. Packets forwarded by the PFC are hardware switched.
If a packet is sent to MSFC to be forwarded then we refer to this a punting to the CPU. As i say you try and avoid this at all costs. Some examples -
1) using the log keyword on acl can cause all packets matching that entry to be sent to the CPU. Note this is not an issue with the 6500 if you use OAL (Optimised ACL logging).
2) using deny entries in a PBR acl on the 3560/3750 switches will cause all packets matched by those deny lines to be sent to the CPU.
Both of the above could severly degrade the performance of the switch.
Although we have used a 6500 as an example the principle applies to all L2/L3 switches. Obviously some of these don't have a dedicated MSFC/PFC but they still have a main CPU and dedicated ASICs for forwarding the data.
Compare the above to a software based router. As far as i know the ASRs/7600/GSRs are the only hardware based routers. So using a 7200 as an example, all it's packets are forwarded in software. This is why switches have much greater forwarding rates than routers in general.
But there is a tradeoff. Because the performance of a switch comes from ASICs you can face limitations that you do not face on a software based router. QOS is a good example. On a software based router you have the full MQC feature set. On hardware switches, not only do QOS capabilities change from switch to switch model (because the ASICs have different capabilities on different switches) but also some things are not supported. Shaping, as supported on routers, is a good example.
Hope that has helped a bit.
Jon
08-29-2011 02:45 PM
Hi Ankur,
this is the link of a project to design a L2/L3 switch with a mixed HW/SW architecture and it provides a very good explanation of how transit between the 2 level works. What it is best is a decent list of references:
http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.79.8262&rep=rep1&type=pdf
A good primer on Layer2 switches architecture based on Programmable Logic Devices
The best one on Cisco switches is this from Cisco Press
http://www.ciscopress.com/articles/article.asp?p=102093&seqNum=2
I am myself weak on switching and I believe there is a lot to it especially about doing it on routing platforms like the new ISR G2 with IRB enabled. If you have some about that please share.
Hope this helps some.
Fabio
08-29-2011 03:57 PM
Ankur
It's often spread through a lot of different docs and your question is very general so perhaps some more specifics would help.
In general switches both L2 and L3 have dedicated ASICs (Application Specific Integrated Circuits) which allow them to forward packets in hardware. These ASICs are very good at doing specific tasks but they are not general purpose processors such as the main CPU.
So a switch looks to forward as many as packets as possible using the ASICs. If we use a 6500 as an example - the supervisor on a 6500 contains an MSFC card and a PFC card.
The MSFC is responsible for the control plane protocols at L2 and L3 these being STP/CDP/VTP/PagP etc. at L2 and the routing protocol at L3. So it establishes and exchanges routes with any L3 peers. All these functions are handled by the main CPU and therefore are handled in software. The MSFC can also forward packets but you want to avoid this if at all possible. If packets are forwarded by the MSFC then we refer to these as being software switched.
The PFC is responsible for forwarding the actual data and it does this using ASICs. Note that the linecards in a 6500 also have dedicated ASICs for the port connections and connections to the switch fabric. Packets forwarded by the PFC are hardware switched.
If a packet is sent to MSFC to be forwarded then we refer to this a punting to the CPU. As i say you try and avoid this at all costs. Some examples -
1) using the log keyword on acl can cause all packets matching that entry to be sent to the CPU. Note this is not an issue with the 6500 if you use OAL (Optimised ACL logging).
2) using deny entries in a PBR acl on the 3560/3750 switches will cause all packets matched by those deny lines to be sent to the CPU.
Both of the above could severly degrade the performance of the switch.
Although we have used a 6500 as an example the principle applies to all L2/L3 switches. Obviously some of these don't have a dedicated MSFC/PFC but they still have a main CPU and dedicated ASICs for forwarding the data.
Compare the above to a software based router. As far as i know the ASRs/7600/GSRs are the only hardware based routers. So using a 7200 as an example, all it's packets are forwarded in software. This is why switches have much greater forwarding rates than routers in general.
But there is a tradeoff. Because the performance of a switch comes from ASICs you can face limitations that you do not face on a software based router. QOS is a good example. On a software based router you have the full MQC feature set. On hardware switches, not only do QOS capabilities change from switch to switch model (because the ASICs have different capabilities on different switches) but also some things are not supported. Shaping, as supported on routers, is a good example.
Hope that has helped a bit.
Jon
08-29-2011 04:18 PM
Thanks Jon. Nice explanation.
Bookmarked!
08-29-2011 04:39 PM
Cheers Leo
08-29-2011 07:08 PM
Hi Jon and Fabio,
Thank you so much..This will really help.
So whatever is mentioned for 6k,does that exactly holds good for 3k,or are there some differences.
08-30-2011 03:21 AM
Ankur
So whatever is mentioned for 6k,does that exactly holds good for 3k,or are there some differences.
No, there will be differences because different switches have different capabilities. As i say the 3k switches don't have MSFC/PFC concept, oversubscription is less of an issue generally on 3k's etc.
But the principle of using ASICs for forwarding packets in hardware and using the main CPU for control plane functions is the same across switches.
Jon
06-20-2016 04:02 AM
I found this document helpful in understanding hardware forwarding,
https://www.cisco.com/c/en/us/products/collateral/switches/catalyst-6500-series-switches/prod_white_paper0900aecd80673385.html
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