Marcel,
In Ethernet, FCS is based on a Cyclical Redundancy Check, or CRC computation. Without going too deep into maths, CRC is the remainder after dividing two polynomials - the first polynomial is the data to be protected, the second polynomial is the specific parameter of the CRC mechanism in use, and after dividing them, the remainder is the CRC value. As with dividing two ordinary integers, this remainder is what was "missing" in the first polynomial to make it an "integer" multiple of the second polynomial. If this remainder is "added" to the first polynomial, then the next time CRC is computed over the first polynomial (now with the remainder added), the new computed remainder will be zero, as the first polynomial now becomes an "integer" multiple of the second polynomial.
This is used to verify FCS efficiently. A switch does not need to wait for an entire frame to come in, then compute the CRC over all the contents except the FCS field, and compare the result with the FCS field. Instead, the switch can simply compute the CRC value as the frame comes in, and at the end, when an entire frame is received and the CRC was computed over the entire frame data including its FCS field, the CRC result must be zero. If it is different, an error has occurred.
Best regards,
Peter
