Hi all,
I am having issues with one circuit, it has a lot of line and path code violations, slip secs, line errors, etc
E1 0/0/1 is up.
Applique type is Channelized E1 - balanced
No alarms detected.
alarm-trigger is not set
Version info Firmware: 20100222, FPGA: 13, spm_count = 0
Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.
Data in current interval (187 seconds elapsed):
3 Line Code Violations, 82 Path Code Violations
7 Slip Secs, 0 Fr Loss Secs, 2 Line Err Secs, 0 Degraded Mins
9 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
Total Data (last 22 15 minute intervals):
3780 Line Code Violations, 9605 Path Code Violations,
718 Slip Secs, 5 Fr Loss Secs, 279 Line Err Secs, 4 Degraded Mins,
981 Errored Secs, 0 Bursty Err Secs, 5 Severely Err Secs, 31 Unavail Secs
The Carrier said tha they have all correclty configured, all the parameters are correct and that the problem is on our side.
we have this configuration:
card type e1 0 0
interface Serial0/0/1:0
description ****
bandwidth 512
ip address 172.31.227.217 255.255.255.252
no ip redirects
encapsulation ppp
no cdp enable
service-policy output AVPN
Controller E1 0/0/1
framing NO-CRC4
channel-group 0 timeslots 1-8
Could you guys please help to understand what is happening?
Thanks in advance