The meaning of unified buffer per ASIC

[osw200051]

Dear expert,

I found that C9500 datasheet mentioned the port buffer is "Up to 36 MB of unified buffer per ASIC".

But I have the following questions:

1. How to I calculate the buffer per port?  

2. On C9500, how many ports are served by one ASIC?

Thanks so much!

[Giuseppe Larosa]

Hello osw200051,

you can read the Cisco Catalyst 9500 architecture whitepaper

https://www.cisco.com/c/dam/en/us/products/collateral/switches/catalyst-9500-series-switches/white-paper-c11-741484.pdf

You should be referring to the UADP ASIC version 3.0.

If you look at figure 10, that describes the architecture with two UADP ASIC 3.0, 16 ports should be managed by a single ASIC.

We can only think that the buffer is shared between the ports. There is no more info.

Hope to help

Giuseppe

[Georg Pauwen]

Hello,

looking at the switch architecture white paper linked below, you have two ASICs (either UADP 2.0 XL or UADP 3.0 XL, where the latter ASICs have a much higher switching and forwarding capacity). Each ASIC servers half of the ports, and each port can use up to 36MB (in case of the UADP 3.0 XL ASIC) buffer. So the buffer per port depends on the amount of ports active...

https://www.cisco.com/c/dam/en/us/products/collateral/switches/catalyst-9500-series-switches/white-paper-c11-741484.pdf

[Scott Hodgdon]

osw200051,

If you go to ciscolive.com and search for "BRKARC-2007" in the On-Demand Library, you can see the deep dive session for the Catalyst 9500 series from Cisco Live Orlando 2018. Everyone with a Cisco login has access to this resource,  even  if they have never been to Cisco Live. There is also a video of the session you can watch, so you can hear the presenter's comments instead of just reading the PDF.

Cheers,
Scott Hodgdon

Senior Technical Marketing Engineer

Enterprise Networking Group

[osw200051]

Thanks Scoff and all,

I got the answer,

Thank you so much.