Hi Experts,
I need a point of clarification, and if anyone would be so bold as to SHOW me a way to pove this point, I'd be extremely grateful.
The point in question is the order in which a Hyperflex controller seeks the target information for a Read Request. The confusion comes about because I have three very good sources which offer three different sequences, at least for the first 3 steps - and in particular the first step. Does HX look at flash cache or L1 RAM cache first? And is the Passive write log checked?
Hyperconverged Infrastructure Data Centers, Demystifying HCI. Sam Halabi (p186) tells me that a read operation happens like this:
- For data that was recently written and not destaged yet, the data may be found in the active write log of the SSD cache. [of the primary node]
- If the data is not in the active write log, check the metadata to see whether the data is in the active write log of remote nodes.
- Check the L1 memory cache.
Comment:
Given that this content was reviewed by Malik Mahalingam, you'd reckon it would be correct. Note that this sequence make no mention of the PASSIVE write logs
But in a CIsco live presentation - BRKINI-2016 2020 - says the order is:
- Active write log of primary node
- Passive write logs
- L1 (DRAM) cache
Comment:
No mention of the Active write logs of the other nodes, but he does include the Passive write logs - although I do believe Brian Everitt is a little confused about Passive Write logs and Secondary logs in his slides, but that can be a discussion for another time.
Now to really confuse me, I also have a presentaion used for Cisco TAC training that is based on BRKINI-2016 2020 - but has on the slide that discusses the read cycle, the authors have the order - highlighted in red as if to make a point - in the following order:
- L1 (DRAM) cache
- Active write log of primary node
- Passive write logs
Comment:
Again, no mention of the Active write logs of the other nodes, but the real mystery is that the L1 (DRAM) cache has been put at the top of the list. Now, this to me sounds more logical - why would you look at the flash cache and read somethign into memory if it was already in memory?
So. Can anyone help me? You may see the question as trivial, and sya that the order doesn't really matter. But I am a pedant, and this matters to me.
RedNectar
References:
- Hyperconverged Infrastructure Data Centers, Demystifying HCI. Sam Halabi
Reviewed by Aaron Kapacinskas and Mallik Mahalingam (CTO of HyperFlex product at Cisco and co-founder of Springpath Inc., in 2012) - Cisco HyperFlex Architecture Deep Dive, System Design and Performance Analysis. Brian Everitt, Technical Marketing Engineer @CiscoTMEguy BRKINI-2016 2020
- Cisco TAC training material presented by Himanshu Sardana and Yogesha MG.
