I have my VG 28xx to have Slips occur in the T1 circuit(only 1 T1 for the site).
Below is the controller t1 output.
T1 0/0/0 is up.
Applique type is Channelized T1
Cablelength is long 0db
Description: PRI for Voice
No alarms detected.
alarm-trigger is not set
Soaking time: 3, Clearance time: 10
AIS State:Clear LOS State:Clear LOF State:Clear
Version info Firmware: 20100222, FPGA: 13, spm_count = 0
Framing is ESF, Line Code is B8ZS, Clock Source is Line.
CRC Threshold is 320. Reported from firmware is 320.
Data in current interval (620 seconds elapsed):
0 Line Code Violations, 0 Path Code Violations
103 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
103 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
Total Data (last 24 hours)
0 Line Code Violations, 0 Path Code Violations,
14412 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,
14412 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
Would using the cmd network-clock-select 1 T1 0/0/0 stop the Slip Secs and would configuring this bring a disruption of services.?
Thanks in advance for helping out.
Go to Solution.
Yes, u need to configure the above mentioned to stop slips.
before issuing this command , do "clear counters" and then, issue network-select command.
There would be definetely some disruption since the Circuit is being used for Voice .Above that, it would be better to do it and resolve the issue.
Refer this URL which explains clock mismatch leads to SLips.
View solution in original post
Thank you Aman..!!!
Should the PRI needs to be reset after configuring the network-clock-select 1 T1 0/0/0.
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