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UCS chassis PSU error

ashjosh11
Level 1
Level 1

Hi team ,

We are getting error on PSU for Cisco UCS chassis.

Its showing NA under performance & voltage tab.

We tried resetating PSU as well as removing power cable & connecting it back.PSU.JPG

PSU is power-on & operational.

Can anyone suggest why this issue is & how to get rid of this.

5 Replies 5

David Alpizar
Cisco Employee
Cisco Employee

Hi Ashish ,

What is the power policy on the chassis?

What is the firmware version running in the system?

Something you could try is resetting all power supplies one by one (wait until it comes back online to reset the  next one). This could be caused by a known issue.

Hope this helps!

David

David Alpizar
Cisco Employee
Cisco Employee

Ashish ,

Check on this answers from the community:

https://supportforums.cisco.com/message/3937482#3937482

-David

Hi David ,

What is the power policy on the chassis? - GRID

What is the firmware version running in the system? 2.0(4a)

Earlier it was N+1 & we changed it to GRID. After this we noticed this issue.

I tried unplugging & plug back Power cables for UCS chassis.  But no help.

Ashish,

Could you please run the following commands and post them here:

ssh to fabric Interconnect A  (later try the same on Fabric B same chassis, please)

connect iom x (x = chassis #)

show platform software cmcctrl power redundancy

show platform software cmcctrl showi2c

-Kenny

Hi Ashish ,

It is possible that you are hitting I2C issues. I recommend to open a TAC case to have an engineer look at your environment and confirm that the I2C bus is congested.

.

Here are your options to clear the i2c bus:

1.You can reseat the IOMs you will need to reseat one IOM at a time starting with the IOM connected to the subordinated fabric,   This should not cause a complete outage.  However, you should perform this during a maintenance window.  Please note, this method does not always clear the i2c bus 100% of the time.  You may have to use option 2 if this is the case. 

2.The second option is to power down then power back up the chassis.  This method clears the i2c bus 100% of the time.  However, the down side is it is service impacting and will need to be done during a maintenance window.

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