04-28-2014 05:04 AM
Hi to all,
I need to synchronize an ASR9K with a Symmetricom TP5000 Grand Master, for this I have a 2Mhz signal, incoming in the BITS input of the RSP440. The problem that I found is that the Sync0 input appears as "Unqualified" and I don't know how to make or which parameter I can change in order to get the "Locked" status:
RP/0/RSP0/CPU0:ASR9K-BH(config-freqsync)#do show frequency synchronization clo$
Sun Apr 27 13:34:27.286 UTC
Flags: > - Up D - Down S - Assigned for selection
d - SSM Disabled s - Output squelched L - Looped back
Node 0/RSP0/CPU0:
==============
Fl Clock Interface QLrcv QLuse Pri QLsnd Output driven by
===== =================== ====== ====== === ====== ========================
>S Sync0 None STU 1 n/a n/a
D Sync1 n/a n/a n/a n/a n/a
D Sync2 n/a n/a n/a n/a n/a
>S Internal0 n/a ST3E 255 n/a n/a
RP/0/RSP0/CPU0:ASR9K-BH(config-freqsync)#do sh fre syn selection
Sun Apr 27 13:34:36.721 UTC
Node 0/RSP0/CPU0:
==============
Selection point: T0-SEL-B (2 inputs, 1 selected)
Last programmed 3d15h ago, and selection made 00:00:43 ago
Next selection points
SPA scoped : None
Node scoped : T4-SEL-C CHASSIS-TOD-SEL
Chassis scoped: LC_TX_SELECT
Router scoped : None
Uses frequency selection
Used for local line interface output
S Input Last Selection Point QL Pri Status
== ======================== ======================== ===== === ===========
1 Internal0 [0/RSP0/CPU0] n/a ST3E 255 Holdover
Sync0 [0/RSP0/CPU0] n/a STU 1 Unqualified
Selection point: T4-SEL-A (0 inputs, 0 selected)
Last programmed 1w4d ago, and selection made 00:00:43 ago
Next selection points
SPA scoped : None
Node scoped : T4-SEL-C
Chassis scoped: None
Router scoped : None
This is the configuration that I made:
RP/0/RSP0/CPU0:ASR9K-BH#sh run frequency synchronization
Sun Apr 27 13:39:57.686 UTC
frequency synchronization
quality itu-t option 2 generation 2
log selection changes
!
I don't know if exist some way to test o to know if the signal that is comming into the BITS input is good to permit the synchronize in this way.
Any help or documentation to understand this will be appreciated
Thanks a Lot
Emiliano
04-28-2014 05:08 PM
Duplicate posts.
Go here: http://supportforums.cisco.com/discussion/12188471/asr9k-frequency-sinchronization-2mhz-bits
05-01-2014 10:42 AM
Hi Emiliano,
What does your sync port0 configuration look like?
It does look like your signal is unusable because of its "quality".
Use this config:
clock-interface sync 0 location 0/RSP0/CPU0 port-parameters bits-input t1 d4 ami ! frequency synchronization selection input !
And more importantly for the quality parameters try:
frequency synchronization quality itu-t option 2 generation 1
I dont think so based on the outputs I see, because it is "selectable" but it may be that the incorrect framing was chosen on the T1 for instance that would make this port unusable. If the sync port is DOWN and has an active alarm that first config piece may help for that.
This link/reference may help in terms of further documentation:
https://supportforums.cisco.com/document/133781/asr9000xr-frequency-synchronization
regards
xander
05-22-2014 10:49 AM
Hi Xander!
Excuse me for the delay, but I was to travel for other project, but now I'm with this issue again.
I have used the link that you send me to configure this ASR9K as Grand Master, but now I'm trying to set the ASR9K to be synchronized from a 2 Mhz output (from an instrument called ANUE).
The idea is (only to test all the possibilities in that the ASR9K can be configured) take the 2Mhz that the ANUE give us, and in base to this signal transport the frequency by PTP. The problem that I found is that the signal that come from the ANUE don't give us the QL, so the signal that ingress to the BITS Sync0 interface don't become valid and is seen as Unqualified.
There are some outputs:
RP/0/RSP0/CPU0:ASR9K-BH#sh frequency synchronization clock-interfaces
Wed May 21 19:25:16.466 UTC
Node 0/RSP0/CPU0:
==============
Clock interface Sync0 (Up - BITS 2M)
Assigned as input for selection
Wait-to-restore time 1 minute
SSM supported and enabled
Input:
Up
Last received QL: None
Effective QL: Opt-II,2/STU, Priority: 1, Time-of-day Priority 100
Supports frequency
Output is disabled
Next selection points: T0-SEL-B
RP/0/RSP0/CPU0:ASR9K-BH#sh frequency synchronization selection
Wed May 21 19:25:12.798 UTC
Node 0/RSP0/CPU0:
==============
Selection point: T0-SEL-B (2 inputs, 1 selected)
Last programmed 04:03:19 ago, and selection made 04:03:19 ago
Next selection points
SPA scoped : None
Node scoped : T4-SEL-C CHASSIS-TOD-SEL
Chassis scoped: LC_TX_SELECT
Router scoped : None
Uses frequency selection
Used for local line interface output
S Input Last Selection Point QL Pri Status
== ======================== ======================== ===== === ===========
1 Internal0 [0/RSP0/CPU0] n/a ST3E 255 Holdover
Sync0 [0/RSP0/CPU0] n/a STU 1 Unqualified
I think that because I don't receive the QL, the Sync0 is not selected.
The configuration that I have is this:
ptp
clock
domain 4
priority1 100
!
profile MASTER
transport ipv4
sync frequency 64
clock operation two-step
announce frequency 16
delay-request frequency 64
!
clock-selection telecom-profile
clock-advertisement telecom-profile
!
frequency synchronization
quality itu-t option 2 generation 2
clock-interface timing-mode system
log selection changes
!
clock-interface sync 0 location 0/RSP0/CPU0
port-parameters
bits-input 2m
!
frequency synchronization
selection input
priority 1
wait-to-restore 1
quality receive lowest itu-t option 2 generation 2 SMC
!
!
I try to change the type of Option and Generation without success, also I tried with the Sync0 configured as E1 (here in Argentina, we use E1 instead of T1) also provided by the ANUE, and in this case we can work perfectly, also setting the correct QL to the E1 signal.
But in the case of the 2Mhz I can't set any related to the QL in the ANUE, and also in the ASR9K.
Is some way to override the QL that comes from the 2Mhz signal?
Thanks a Lot again!
Emiliano
05-22-2014 05:12 PM
Hi Emiliano,
I checked in with my timing guys and Julian P. advised that there is a possibility to achieve what you want here.
His note suggested the following:
The way to do this is to override the input QL on the clock-interface so that the QL is high enough that the clock-interface gets selected
Config:
clock-interface sync 0 location 0/RSP0/CPU0
frequency synchronization
ssm-disable
ql-receive exact option 2 gen 2 PRS
regards
xander
05-23-2014 08:00 AM
Hi Xander,
Thanks for your concern and you help!
Yesterday I made another test, in order to discard points of failure.
I try to configure the Sync1 as output and generating a 2 Mhz signal. So I take this signal and loop with the Sync0 configured as I show you, input and 2 Mhz, and with this new signal, the Sync0 now is selected.
RP/0/RSP0/CPU0:ASR9K-BH#sh frequency synchronization selection
Wed May 21 20:11:27.056 UTC
Node 0/RSP0/CPU0:
==============
Selection point: T0-SEL-B (2 inputs, 1 selected)
Last programmed 00:00:18 ago, and selection made 00:00:13 ago
Next selection points
SPA scoped : None
Node scoped : T4-SEL-C CHASSIS-TOD-SEL
Chassis scoped: LC_TX_SELECT
Router scoped : None
Uses frequency selection
Used for local line interface output
S Input Last Selection Point QL Pri Status
== ======================== ======================== ===== === ===========
1 Sync0 [0/RSP0/CPU0] n/a STU 1 Locked
Internal0 [0/RSP0/CPU0] n/a ST3 255 Available
RP/0/RSP0/CPU0:ASR9K-BH#sh frequency synchronization clock-interfaces
Wed May 21 20:13:12.707 UTC
Node 0/RSP0/CPU0:
==============
Clock interface Sync0 (Up - BITS 2M)
Assigned as input for selection
Wait-to-restore time 1 minute
SSM supported and enabled
Input:
Up
Last received QL: None
Effective QL: Opt-II,1/STU, Priority: 1, Time-of-day Priority 100
Supports frequency
Output is disabled
Next selection points: T0-SEL-B
I think that I must have some problem about the quality of the 2 Mhz signal, maybe the signal is not so good or is attenuated, I must take and oscilloscope in order to see what kind of signal is received at the end of the coaxial wire.
But also I don't think that in 2 Mhz signal the QL can be transmitted.
One more time, thanks a lot for your help and dedication.
Best regards
Emiliano
05-23-2014 08:54 AM
correct emiliano, there is no QL in unframed, hence the need to accept the input with the lowest quality config.
the output shows fine though now.
you found a nice workaround btw!
let me know if the config proposed to ignore the QL and disable SSM does it too for you.
regards
xander
05-26-2014 06:04 AM
Hi Xander,
Definitely I have a signal problem in this case. As soon as I can, I will get an oscilloscope to graph what kind of signal I'm getting from the ANUE equipment. The configuration without SSM in this case don't cause any effect. I have tested with another signal of 2MHz and also is in state "Locked". So something bad is coming from ANUE.
Just in case, an E1 interface "unframed" is the same as a 2MHz signal? (excuse me for my ignorance.
Best Regards
Emiliano
05-26-2014 06:06 AM
Nice troubleshooting Emiliano! Good to hear we found the culprit there!
yeah sorry, 2Mhz = E1 unframed.
regards
xander
05-28-2014 05:53 AM
Hi Xander,
I had some time to make additional troubleshooting:
Basically the main reason why the 2m signal is not selected, is because the ANUE don't generate 2,048Khz and only generate 2,000Khz (the ANUE gives the option of generate the 2Mhz signal dividing the original 10Mhz by 5), so with this big difference of frequency, the signal is not eligible for the synchronization.
There is a big difference between 2Mhz and 2,048Khz. Maybe if we are talking in networking environment we know that the 1M or the 1,024K is the same, but in frequency is another thing.
Also I've checked that an E1 unframmed is not a pure 2m interface/signal valid to generate the sync signal in the Sync0 interface, this is because when you configure the interface as E1, also is attached an encoding (AMI or HDB3 so the signal travel like 0 and 1) and in the Sync0 (or Sync1) we need a pure 2,048Khz signal. Is the only way to bring UP the Sync0 configure as 2m (really 2,048Khz).
So take in mind that the 2m configuration y the Sync0 or Sync1 must be a pure 2,048Khz signal, not an 2,000Khz (maybe derived from a 10Mhz signal, like the ANUE instrument do)
I have a nice picture of my testing (see 20140526_161208.jpg)
Pd: in the picture you can see the minimum frequency in which the ASR9K can get the "Locked" state
Thanks a lot for your help, and I hope that this discussion can help to anyone
Best Regards
Emiliano
05-28-2014 10:15 AM
ah yeah... it needs to be an E1 like so 2.048... not 2000...
ok that explains it why that converter box you have wont wok nicely...
thanks for following up!!
xander
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