show controllers e1 - question

[Patricio Vega de la Llosa]

This command is showing me the following alarms in two E1 interfaces. What troubleshooting should I do? I see alarms in: slip secs, Fr Loss Secs, Line Err Secs, Degraded mins, etc, etc.

Shoul I also check something in the CUCM (ver. 8.6.2.20000-2)?

E1 0/1/0 is up.

  Applique type is Channelized E1 - balanced

  No alarms detected.

  alarm-trigger is not set

  Version info FPGA Rev: 08121917, FPGA Type: PRK4

  Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

  International Bit: 1, National Bits: 11111

  Data in current interval (579 seconds elapsed):

     0 Line Code Violations, 0 Path Code Violations

     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

  Total Data (last 24 hours)

    446 Line Code Violations, 522 Path Code Violations,

     2 Slip Secs, 48 Fr Loss Secs, 2 Line Err Secs, 3 Degraded Mins,

     134 Errored Secs, 26 Bursty Err Secs, 0 Severely Err Secs, 50 Unavail Secs

E1 0/1/1 is up.

  Applique type is Channelized E1 - balanced

  No alarms detected.

  alarm-trigger is not set

  Version info FPGA Rev: 08121917, FPGA Type: PRK4

  Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

  International Bit: 1, National Bits: 11111

  Data in current interval (579 seconds elapsed):

     0 Line Code Violations, 0 Path Code Violations

    200 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

     200 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

  Total Data (last 24 hours)

     0 Line Code Violations, 0 Path Code Violations,

     29774 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

     29774 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Thanks for any help.

Best,

Patricio

[Erick Bergquist · Accepted solution]

Those errors are layer 1 errors with the E1 circuit if they are still incrementing. Clear the counters, show controller a few times and if the errors are increasing then check the cable between router interface and smartjack.

Call your provider and have them
Test the circuit for issues.



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[Patricio Vega de la Llosa]

Ok, thank you for your response.

If there's any other suggestions, they are very welcomed.

Patricio

[Leo Salcie Tejeda · Accepted solution]

Hi Patricio,

This errors appear generally when you have a cable problem, try to replace the E1 cable....

Regards

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[Patricio Vega de la Llosa]

Thank you Leo.

Replacing the cable will absolutely resolve the problem?

After 515 minutes, it's showing this info now:

E1 0/1/0 is up.

  Applique type is Channelized E1 - balanced

  No alarms detected.

  alarm-trigger is not set

  Version info FPGA Rev: 08121917, FPGA Type: PRK4

  Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

  International Bit: 1, National Bits: 11111

  Data in current interval (99 seconds elapsed):

     0 Line Code Violations, 0 Path Code Violations

     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

  Total Data (last 5 15 minute intervals):

     0 Line Code Violations, 0 Path Code Violations,

     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

E1 0/1/1 is up.

  Applique type is Channelized E1 - balanced

  Description: ## TRAMA CLARO 5551-0600 ##

  No alarms detected.

  alarm-trigger is not set

  Version info FPGA Rev: 08121917, FPGA Type: PRK4

  Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

  International Bit: 1, National Bits: 11111

  Data in current interval (99 seconds elapsed):

     0 Line Code Violations, 0 Path Code Violations

     35 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

     35 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

  Total Data (last 5 15 minute intervals):

     0 Line Code Violations, 0 Path Code Violations,

     1550 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

     1550 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

Patricio

[Patricio Vega de la Llosa]

And now:

E1 0/1/0 is up.

  Applique type is Channelized E1 - balanced

  No alarms detected.

  alarm-trigger is not set

  Version info FPGA Rev: 08121917, FPGA Type: PRK4

  Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

  International Bit: 1, National Bits: 11111

  Data in current interval (374 seconds elapsed):

     0 Line Code Violations, 0 Path Code Violations

     0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

     0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

  Total Data (last 6 15 minute intervals):

     211 Line Code Violations, 268 Path Code Violations,

     1 Slip Secs, 23 Fr Loss Secs, 2 Line Err Secs, 1 Degraded Mins,

     102 Errored Secs, 16 Bursty Err Secs, 0 Severely Err Secs, 20 Unavail Secs

E1 0/1/1 is up.

  Applique type is Channelized E1 - balanced

  Description: ## TRAMA CLARO 5551-0600 ##

  No alarms detected.

  alarm-trigger is not set

  Version info FPGA Rev: 08121917, FPGA Type: PRK4

  Framing is NO-CRC4, Line Code is HDB3, Clock Source is Line.

  International Bit: 1, National Bits: 11111

  Data in current interval (374 seconds elapsed):

     0 Line Code Violations, 0 Path Code Violations

     128 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins

     128 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs

  Total Data (last 6 15 minute intervals):

     0 Line Code Violations, 0 Path Code Violations,

     1861 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins,

     1861 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs